ramips: update dtsi files to support second spi device
Signed-off-by: Michael Lee <igvtee@gmail.com> SVN-Revision: 47580v19.07.3_mercusys_ac12_duma
John Crispin
9 years ago
parent
a941b34008
commit
c550ad3d3a
@ -1,368 +0,0 @@
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From 27b11d4f1888e1a3d6d75b46d4d5a4d86fc03891 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Wed, 6 Aug 2014 10:53:40 +0200
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Subject: [PATCH 51/57] SPI: MIPS: ralink: add rt5350 dual SPI support
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Signed-off-by: John Crispin <blogic@openwrt.org>
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
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---
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drivers/spi/spi-rt2880.c | 218 +++++++++++++++++++++++++++++++++++++++++++---
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1 file changed, 205 insertions(+), 13 deletions(-)
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--- a/drivers/spi/spi-rt2880.c
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+++ b/drivers/spi/spi-rt2880.c
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@@ -21,19 +21,25 @@
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#include <linux/io.h>
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#include <linux/reset.h>
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#include <linux/spi/spi.h>
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+#include <linux/of_device.h>
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#include <linux/platform_device.h>
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+#include <ralink_regs.h>
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+
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+#define SPI_BPW_MASK(bits) BIT((bits) - 1)
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+
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#define DRIVER_NAME "spi-rt2880"
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-/* only one slave is supported*/
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-#define RALINK_NUM_CHIPSELECTS 1
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/* in usec */
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#define RALINK_SPI_WAIT_MAX_LOOP 2000
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-#define RAMIPS_SPI_STAT 0x00
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-#define RAMIPS_SPI_CFG 0x10
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-#define RAMIPS_SPI_CTL 0x14
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-#define RAMIPS_SPI_DATA 0x20
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-#define RAMIPS_SPI_FIFO_STAT 0x38
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+#define RAMIPS_SPI_DEV_OFFSET 0x40
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+
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+#define RAMIPS_SPI_STAT(cs) (0x00 + (cs * RAMIPS_SPI_DEV_OFFSET))
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+#define RAMIPS_SPI_CFG(cs) (0x10 + (cs * RAMIPS_SPI_DEV_OFFSET))
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+#define RAMIPS_SPI_CTL(cs) (0x14 + (cs * RAMIPS_SPI_DEV_OFFSET))
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+#define RAMIPS_SPI_DATA(cs) (0x20 + (cs * RAMIPS_SPI_DEV_OFFSET))
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+#define RAMIPS_SPI_FIFO_STAT(cs) (0x38 + (cs * RAMIPS_SPI_DEV_OFFSET))
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+#define RAMIPS_SPI_ARBITER 0xF0
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/* SPISTAT register bit field */
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#define SPISTAT_BUSY BIT(0)
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@@ -63,6 +69,19 @@
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/* SPIFIFOSTAT register bit field */
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#define SPIFIFOSTAT_TXFULL BIT(17)
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+#define SPICTL_ARB_EN BIT(31)
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+#define SPI1_POR BIT(1)
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+#define SPI0_POR BIT(0)
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+
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+#define RT2880_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | SPI_CS_HIGH)
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+
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+struct rt2880_spi;
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+
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+struct rt2880_spi_ops {
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+ void (*init_hw)(struct rt2880_spi *rs);
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+ int num_cs;
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+};
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+
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struct rt2880_spi {
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struct spi_master *master;
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void __iomem *base;
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@@ -70,6 +89,8 @@ struct rt2880_spi {
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unsigned int speed;
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struct clk *clk;
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spinlock_t lock;
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+
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+ struct rt2880_spi_ops *ops;
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};
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static inline struct rt2880_spi *spidev_to_rt2880_spi(struct spi_device *spi)
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@@ -115,6 +136,7 @@ static inline void rt2880_spi_clrbits(st
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static int rt2880_spi_baudrate_set(struct spi_device *spi, unsigned int speed)
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{
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+ int cs = spi->chip_select;
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struct rt2880_spi *rs = spidev_to_rt2880_spi(spi);
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u32 rate;
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u32 prescale;
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@@ -142,9 +164,9 @@ static int rt2880_spi_baudrate_set(struc
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prescale = ilog2(rate / 2);
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dev_dbg(&spi->dev, "prescale:%u\n", prescale);
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- reg = rt2880_spi_read(rs, RAMIPS_SPI_CFG);
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+ reg = rt2880_spi_read(rs, RAMIPS_SPI_CFG(cs));
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reg = ((reg & ~SPICFG_SPICLK_PRESCALE_MASK) | prescale);
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- rt2880_spi_write(rs, RAMIPS_SPI_CFG, reg);
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+ rt2880_spi_write(rs, RAMIPS_SPI_CFG(cs), reg);
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rs->speed = speed;
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return 0;
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}
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@@ -157,7 +179,8 @@ rt2880_spi_setup_transfer(struct spi_dev
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{
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struct rt2880_spi *rs = spidev_to_rt2880_spi(spi);
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unsigned int speed = spi->max_speed_hz;
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- int rc;
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+ int rc, cs = spi->chip_select;
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+ u32 reg;
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if ((t != NULL) && t->speed_hz)
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speed = t->speed_hz;
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@@ -169,25 +192,68 @@ rt2880_spi_setup_transfer(struct spi_dev
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return rc;
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}
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+ reg = rt2880_spi_read(rs, RAMIPS_SPI_CFG(cs));
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+
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+ reg = (reg & ~SPICFG_MSBFIRST);
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+ if (!(spi->mode & SPI_LSB_FIRST))
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+ reg |= SPICFG_MSBFIRST;
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+
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+ reg = (reg & ~(SPICFG_SPICLKPOL | SPICFG_RXCLKEDGE_FALLING |SPICFG_TXCLKEDGE_FALLING));
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+ switch(spi->mode & (SPI_CPOL | SPI_CPHA)) {
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+ case SPI_MODE_0:
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+ reg |= SPICFG_SPICLKPOL | SPICFG_TXCLKEDGE_FALLING;
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+ break;
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+ case SPI_MODE_1:
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+ reg |= SPICFG_SPICLKPOL | SPICFG_RXCLKEDGE_FALLING;
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+ break;
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+ case SPI_MODE_2:
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+ reg |= SPICFG_RXCLKEDGE_FALLING;
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+ break;
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+ case SPI_MODE_3:
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+ reg |= SPICFG_TXCLKEDGE_FALLING;
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+ break;
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+ }
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+
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+ rt2880_spi_write(rs, RAMIPS_SPI_CFG(cs), reg);
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+
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+ reg = SPICTL_ARB_EN;
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+ if (spi->mode & SPI_CS_HIGH) {
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+ switch(cs) {
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+ case 0:
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+ reg |= SPI0_POR;
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+ break;
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+ case 1:
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+ reg |= SPI1_POR;
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+ break;
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+ }
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+ }
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+
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+ rt2880_spi_write(rs, RAMIPS_SPI_ARBITER, reg);
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+
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return 0;
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}
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-static void rt2880_spi_set_cs(struct rt2880_spi *rs, int enable)
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+static void rt2880_spi_set_cs(struct spi_device *spi, int enable)
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{
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+ struct rt2880_spi *rs = spidev_to_rt2880_spi(spi);
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+ int cs = spi->chip_select;
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+
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if (enable)
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- rt2880_spi_clrbits(rs, RAMIPS_SPI_CTL, SPICTL_SPIENA);
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+ rt2880_spi_clrbits(rs, RAMIPS_SPI_CTL(cs), SPICTL_SPIENA);
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else
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- rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_SPIENA);
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+ rt2880_spi_setbits(rs, RAMIPS_SPI_CTL(cs), SPICTL_SPIENA);
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}
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-static inline int rt2880_spi_wait_till_ready(struct rt2880_spi *rs)
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+static inline int rt2880_spi_wait_till_ready(struct spi_device *spi)
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{
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+ struct rt2880_spi *rs = spidev_to_rt2880_spi(spi);
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+ int cs = spi->chip_select;
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int i;
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for (i = 0; i < RALINK_SPI_WAIT_MAX_LOOP; i++) {
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u32 status;
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- status = rt2880_spi_read(rs, RAMIPS_SPI_STAT);
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+ status = rt2880_spi_read(rs, RAMIPS_SPI_STAT(cs));
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if ((status & SPISTAT_BUSY) == 0)
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return 0;
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@@ -199,9 +265,10 @@ static inline int rt2880_spi_wait_till_r
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}
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static unsigned int
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-rt2880_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer)
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+rt2880_spi_write_read(struct spi_device *spi, struct list_head *list, struct spi_transfer *xfer)
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{
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struct rt2880_spi *rs = spidev_to_rt2880_spi(spi);
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+ int cs = spi->chip_select;
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unsigned count = 0;
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u8 *rx = xfer->rx_buf;
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const u8 *tx = xfer->tx_buf;
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@@ -213,9 +280,9 @@ rt2880_spi_write_read(struct spi_device
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if (tx) {
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for (count = 0; count < xfer->len; count++) {
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- rt2880_spi_write(rs, RAMIPS_SPI_DATA, tx[count]);
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- rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_STARTWR);
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- err = rt2880_spi_wait_till_ready(rs);
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+ rt2880_spi_write(rs, RAMIPS_SPI_DATA(cs), tx[count]);
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+ rt2880_spi_setbits(rs, RAMIPS_SPI_CTL(cs), SPICTL_STARTWR);
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+ err = rt2880_spi_wait_till_ready(spi);
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if (err) {
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dev_err(&spi->dev, "TX failed, err=%d\n", err);
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goto out;
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@@ -225,13 +292,13 @@ rt2880_spi_write_read(struct spi_device
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if (rx) {
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for (count = 0; count < xfer->len; count++) {
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- rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_STARTRD);
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- err = rt2880_spi_wait_till_ready(rs);
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+ rt2880_spi_setbits(rs, RAMIPS_SPI_CTL(cs), SPICTL_STARTRD);
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+ err = rt2880_spi_wait_till_ready(spi);
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if (err) {
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dev_err(&spi->dev, "RX failed, err=%d\n", err);
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goto out;
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}
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- rx[count] = (u8) rt2880_spi_read(rs, RAMIPS_SPI_DATA);
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+ rx[count] = (u8) rt2880_spi_read(rs, RAMIPS_SPI_DATA(cs));
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}
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}
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@@ -280,25 +347,25 @@ static int rt2880_spi_transfer_one_messa
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}
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if (!cs_active) {
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- rt2880_spi_set_cs(rs, 1);
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+ rt2880_spi_set_cs(spi, 1);
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cs_active = 1;
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}
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if (t->len)
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- m->actual_length += rt2880_spi_write_read(spi, t);
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+ m->actual_length += rt2880_spi_write_read(spi, &m->transfers, t);
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if (t->delay_usecs)
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udelay(t->delay_usecs);
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if (t->cs_change) {
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- rt2880_spi_set_cs(rs, 0);
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+ rt2880_spi_set_cs(spi, 0);
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cs_active = 0;
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}
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}
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msg_done:
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if (cs_active)
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- rt2880_spi_set_cs(rs, 0);
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+ rt2880_spi_set_cs(spi, 0);
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m->status = status;
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spi_finalize_current_message(master);
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@@ -311,7 +378,7 @@ static int rt2880_spi_setup(struct spi_d
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struct rt2880_spi *rs = spidev_to_rt2880_spi(spi);
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if ((spi->max_speed_hz == 0) ||
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- (spi->max_speed_hz > (rs->sys_freq / 2)))
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+ (spi->max_speed_hz > (rs->sys_freq / 2)))
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spi->max_speed_hz = (rs->sys_freq / 2);
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if (spi->max_speed_hz < (rs->sys_freq / 128)) {
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@@ -328,14 +395,47 @@ static int rt2880_spi_setup(struct spi_d
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static void rt2880_spi_reset(struct rt2880_spi *rs)
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{
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- rt2880_spi_write(rs, RAMIPS_SPI_CFG,
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+ rt2880_spi_write(rs, RAMIPS_SPI_CFG(0),
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SPICFG_MSBFIRST | SPICFG_TXCLKEDGE_FALLING |
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SPICFG_SPICLK_DIV16 | SPICFG_SPICLKPOL);
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- rt2880_spi_write(rs, RAMIPS_SPI_CTL, SPICTL_HIZSDO | SPICTL_SPIENA);
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+ rt2880_spi_write(rs, RAMIPS_SPI_CTL(0), SPICTL_HIZSDO | SPICTL_SPIENA);
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}
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+static void rt5350_spi_reset(struct rt2880_spi *rs)
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+{
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+ int cs;
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+
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+ rt2880_spi_write(rs, RAMIPS_SPI_ARBITER,
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+ SPICTL_ARB_EN);
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+
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+ for (cs = 0; cs < rs->ops->num_cs; cs++) {
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+ rt2880_spi_write(rs, RAMIPS_SPI_CFG(cs),
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+ SPICFG_MSBFIRST | SPICFG_TXCLKEDGE_FALLING |
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+ SPICFG_SPICLK_DIV16 | SPICFG_SPICLKPOL);
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+ rt2880_spi_write(rs, RAMIPS_SPI_CTL(cs), SPICTL_HIZSDO | SPICTL_SPIENA);
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+ }
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+}
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+
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+static struct rt2880_spi_ops spi_ops[] = {
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+ {
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+ .init_hw = rt2880_spi_reset,
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+ .num_cs = 1,
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+ }, {
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+ .init_hw = rt5350_spi_reset,
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+ .num_cs = 2,
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+ },
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+};
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+
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+static const struct of_device_id rt2880_spi_match[] = {
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+ { .compatible = "ralink,rt2880-spi", .data = &spi_ops[0]},
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+ { .compatible = "ralink,rt5350-spi", .data = &spi_ops[1]},
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+ {},
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+};
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+MODULE_DEVICE_TABLE(of, rt2880_spi_match);
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+
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static int rt2880_spi_probe(struct platform_device *pdev)
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{
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+ const struct of_device_id *match;
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struct spi_master *master;
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struct rt2880_spi *rs;
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unsigned long flags;
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@@ -343,6 +443,12 @@ static int rt2880_spi_probe(struct platf
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struct resource *r;
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int status = 0;
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struct clk *clk;
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+ struct rt2880_spi_ops *ops;
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+
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+ match = of_match_device(rt2880_spi_match, &pdev->dev);
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+ if (!match)
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+ return -EINVAL;
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+ ops = (struct rt2880_spi_ops *)match->data;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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base = devm_ioremap_resource(&pdev->dev, r);
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@@ -366,14 +472,13 @@ static int rt2880_spi_probe(struct platf
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return -ENOMEM;
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}
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- /* we support only mode 0, and no options */
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- master->mode_bits = 0;
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+ master->mode_bits = RT2880_SPI_MODE_BITS;
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master->setup = rt2880_spi_setup;
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master->transfer_one_message = rt2880_spi_transfer_one_message;
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- master->num_chipselect = RALINK_NUM_CHIPSELECTS;
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master->bits_per_word_mask = SPI_BPW_MASK(8);
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master->dev.of_node = pdev->dev.of_node;
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+ master->num_chipselect = ops->num_cs;
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dev_set_drvdata(&pdev->dev, master);
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@@ -382,12 +487,13 @@ static int rt2880_spi_probe(struct platf
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rs->clk = clk;
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rs->master = master;
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rs->sys_freq = clk_get_rate(rs->clk);
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+ rs->ops = ops;
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dev_dbg(&pdev->dev, "sys_freq: %u\n", rs->sys_freq);
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spin_lock_irqsave(&rs->lock, flags);
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device_reset(&pdev->dev);
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- rt2880_spi_reset(rs);
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+ rs->ops->init_hw(rs);
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return spi_register_master(master);
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}
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@@ -408,12 +514,6 @@ static int rt2880_spi_remove(struct plat
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MODULE_ALIAS("platform:" DRIVER_NAME);
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-static const struct of_device_id rt2880_spi_match[] = {
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- { .compatible = "ralink,rt2880-spi" },
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- {},
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-};
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-MODULE_DEVICE_TABLE(of, rt2880_spi_match);
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-
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static struct platform_driver rt2880_spi_driver = {
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.driver = {
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.name = DRIVER_NAME,
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