brcm63xx: register SPI controllers through DT

Register SPI controllers through device tree. We will wire up the clocks
at a later stage.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
v19.07.3_mercusys_ac12_duma
Jonas Gorski 7 years ago
parent 2a2b16210b
commit b50fd8c2b3

@ -7,6 +7,7 @@
pflash = &pflash;
gpio0 = &gpio0;
gpio1 = &gpio1;
spi0 = &lsspi;
};
cpus {
@ -51,6 +52,7 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
interrupt-parent = <&periph_intc>;
periph_intc: interrupt-controller@fff8c00c {
compatible = "brcm,bcm6345-l1-intc";
@ -70,7 +72,6 @@
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&periph_intc>;
interrupts = <25>, <26>, <27>, <28>;
};
@ -91,5 +92,14 @@
gpio-controller;
#gpio-cells = <2>;
};
lsspi: spi@fff8c800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6358-spi";
reg = <0xfff8c800 0x70c>;
interrupts = <1>;
/* clocks = <&clkctl 9>; */
};
};
};

@ -6,6 +6,7 @@
aliases {
gpio0 = &gpio0;
gpio1 = &gpio1;
spi1 = &hsspi;
};
cpus {
@ -34,6 +35,7 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
interrupt-parent = <&periph_intc>;
ext_intc: interrupt-controller@10000018 {
compatible = "brcm,bcm6318-ext-intc";
@ -42,7 +44,6 @@
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&periph_intc>;
interrupts = <24>, <25>, <26>, <27>;
};
@ -78,5 +79,14 @@
gpio-controller;
#gpio-cells = <2>;
};
hsspi: spi@10003000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6328-hsspi";
reg = <0x10003000 0x600>;
interrupts = <29>;
/* clocks = <&clkctl 25>; */
};
};
};

@ -6,6 +6,8 @@
aliases {
gpio0 = &gpio0;
gpio1 = &gpio1;
spi0 = &lsspi;
spi1 = &hsspi;
};
cpus {
@ -40,6 +42,7 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
interrupt-parent = <&periph_intc>;
ext_intc: interrupt-controller@10000018 {
compatible = "brcm,bcm6345-ext-intc";
@ -48,7 +51,6 @@
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&periph_intc>;
interrupts = <44>, <45>, <46>, <47>;
};
@ -85,5 +87,23 @@
gpio-controller;
#gpio-cells = <2>;
};
lsspi: spi@10000800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6358-spi";
reg = <0x10000800 0x70c>;
interrupts = <80>;
/* clocks = <&clkctl 15>; */
};
hsspi: spi@10001000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6328-hsspi";
reg = <0x10001000 0x600>;
interrupts = <6>;
/* clocks = <&clkctl 16>; */
};
};
};

@ -5,6 +5,7 @@
aliases {
gpio0 = &gpio0;
spi1 = &hsspi;
};
cpus {
@ -33,6 +34,7 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
interrupt-parent = <&periph_intc>;
ext_intc: interrupt-controller@10000018 {
compatible = "brcm,bcm6345-ext-intc";
@ -41,7 +43,6 @@
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&periph_intc>;
interrupts = <24>, <25>, <26>, <27>;
};
@ -68,5 +69,14 @@
interrupt-names = "gpio12", "gpio15",
"gpio23", "gpio24";
};
hsspi: spi@10001000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6328-hsspi";
reg = <0x10001000 0x600>;
interrupts = <29>;
/* clocks = <&clkctl 9>; */
};
};
};

@ -6,6 +6,7 @@
aliases {
pflash = &pflash;
gpio0 = &gpio0;
spi0 = &lsspi;
};
cpus {
@ -44,6 +45,7 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
interrupt-parent = <&periph_intc>;
periph_intc: interrupt-controller@fffe000c {
compatible = "brcm,bcm6345-l1-intc";
@ -76,5 +78,14 @@
ngpios = <8>;
};
lsspi: spi@fffe0c00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6348-spi";
reg = <0xfffe0c00 0x40>;
interrupts = <1>;
/* clocks = <&clkctl 9>; */
};
};
};

@ -7,6 +7,7 @@
pflash = &pflash;
gpio0 = &gpio0;
gpio1 = &gpio1;
spi0 = &lsspi;
};
cpus {
@ -45,6 +46,7 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
interrupt-parent = <&periph_intc>;
periph_intc: interrupt-controller@fffe000c {
compatible = "brcm,bcm6345-l1-intc";
@ -91,5 +93,15 @@
gpio-controller;
#gpio-cells = <2>;
};
lsspi: spi@fffe0c00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6348-spi";
reg = <0xfffe0c00 0x40>;
interrupts = <1>;
/* clocks = <&clkctl 9>; */
};
};
};

@ -7,6 +7,7 @@
pflash = &pflash;
gpio0 = &gpio0;
gpio1 = &gpio1;
spi0 = &lsspi;
};
cpus {
@ -51,6 +52,7 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
interrupt-parent = <&periph_intc>;
periph_intc: interrupt-controller@fffe000c {
compatible = "brcm,bcm6345-l1-intc";
@ -71,7 +73,6 @@
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&periph_intc>;
interrupts = <25>, <26>, <27>, <28>;
};
@ -82,7 +83,6 @@
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&periph_intc>;
interrupts = <20>, <21>;
};
@ -112,5 +112,14 @@
gpio-controller;
#gpio-cells = <2>;
};
lsspi: spi@fffe0800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6358-spi";
reg = <0xfffe0800 0x70c>;
interrupts = <1>;
/* clocks = <&clkctl 9>; */
};
};
};

@ -6,6 +6,8 @@
aliases {
gpio0 = &gpio0;
gpio1 = &gpio1;
spi0 = &lsspi;
spi1 = &hsspi;
};
cpus {
@ -40,6 +42,7 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
interrupt-parent = <&periph_intc>;
ext_intc: interrupt-controller@10000018 {
compatible = "brcm,bcm6345-ext-intc";
@ -48,7 +51,6 @@
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&periph_intc>;
interrupts = <40>, <41>, <42>, <43>;
};
@ -86,5 +88,23 @@
interrupt-names = "gpio24", "gpio25",
"gpio26", "gpio27";
};
lsspi: spi@10000800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6358-spi";
reg = <0x10000800 0x70c>;
interrupts = <2>;
/* clocks = <&clkctl 15>; */
};
hsspi: spi@10001000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6328-hsspi";
reg = <0x10001000 0x600>;
interrupts = <5>;
/* clocks = <&clkctl 16>; */
};
};
};

@ -7,6 +7,7 @@
pflash = &pflash;
gpio0 = &gpio0;
gpio1 = &gpio1;
spi0 = &lsspi;
};
cpus {
@ -41,6 +42,7 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
interrupt-parent = <&periph_intc>;
ext_intc0: interrupt-controller@10000018 {
compatible = "brcm,bcm6345-ext-intc";
@ -49,7 +51,6 @@
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&periph_intc>;
interrupts = <20>, <21>, <22>, <23>;
};
@ -60,7 +61,6 @@
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&periph_intc>;
interrupts = <24>, <25>;
};
@ -102,6 +102,15 @@
gpio-controller;
#gpio-cells = <2>;
};
lsspi: spi@10000800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6358-spi";
reg = <0x10000800 0x70c>;
interrupts = <1>;
/* clocks = <&clkctl 9>; */
};
};
pflash: nor@18000000 {

@ -0,0 +1,50 @@
From 0a0c39044332a75eaf4a3c5654079df953b0d839 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jogo@openwrt.org>
Date: Mon, 7 Sep 2015 21:00:38 +0200
Subject: [PATCH 3/8] spi/bcm63xx: document device tree bindings
Add documentation for the bindings of the low speed SPI controller found
on most bcm63xx SoCs.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
---
.../devicetree/bindings/spi/spi-bcm63xx.txt | 33 ++++++++++++++++++++++
1 file changed, 33 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-bcm63xx.txt
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-bcm63xx.txt
@@ -0,0 +1,33 @@
+Binding for Broadcom BCM6348/BCM6358 SPI controller
+
+Required properties:
+- compatible: must contain one of "brcm,bcm6348-spi", "brcm,bcm6358-spi".
+- reg: Base address and size of the controllers memory area.
+- interrupts: Interrupt for the SPI block.
+- clocks: phandle of the SPI clock.
+- clock-names: has to be "spi".
+- #address-cells: <1>, as required by generic SPI binding.
+- #size-cells: <0>, also as required by generic SPI binding.
+
+Optional properties:
+- num-cs: some controllers have less than 8 cs signals. Defaults to 8
+ if absent.
+
+Child nodes as per the generic SPI binding.
+
+Example:
+
+ spi@10000800 {
+ compatible = "brcm,bcm6368-spi", "brcm,bcm6358-spi";
+ reg = <0x10000800 0x70c>;
+
+ interrupts = <1>;
+
+ clocks = <&clkctl 9>;
+ clock-names = "spi";
+
+ num-cs = <5>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };

@ -0,0 +1,98 @@
From 3353228a04a004ec67073871f40cf58dc4e209aa Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Mon, 7 Sep 2015 21:01:38 +0200
Subject: [PATCH 4/8] spi/bcm63xx: add support for probing through devicetree
Add required binding support to probe through device tree.
Use the compatible instead of the resource size for identifiying the
block type, and allow reducing the number of cs lines through OF.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
drivers/spi/spi-bcm63xx.c | 42 ++++++++++++++++++++++++++++++++++++------
1 file changed, 36 insertions(+), 6 deletions(-)
--- a/drivers/spi/spi-bcm63xx.c
+++ b/drivers/spi/spi-bcm63xx.c
@@ -26,6 +26,7 @@
#include <linux/completion.h>
#include <linux/err.h>
#include <linux/pm_runtime.h>
+#include <linux/of.h>
/* BCM 6338/6348 SPI core */
#define SPI_6348_RSET_SIZE 64
@@ -485,21 +486,48 @@ static const struct platform_device_id b
},
};
+static const struct of_device_id bcm63xx_spi_of_match[] = {
+ { .compatible = "brcm,bcm6348-spi", .data = &bcm6348_spi_reg_offsets },
+ { .compatible = "brcm,bcm6358-spi", .data = &bcm6358_spi_reg_offsets },
+ { },
+};
+
static int bcm63xx_spi_probe(struct platform_device *pdev)
{
struct resource *r;
const unsigned long *bcm63xx_spireg;
struct device *dev = &pdev->dev;
- int irq;
+ int irq, bus_num;
struct spi_master *master;
struct clk *clk;
struct bcm63xx_spi *bs;
int ret;
+ u32 num_cs = BCM63XX_SPI_MAX_CS;
- if (!pdev->id_entry->driver_data)
- return -EINVAL;
+ if (dev->of_node) {
+ const struct of_device_id *match;
- bcm63xx_spireg = (const unsigned long *)pdev->id_entry->driver_data;
+ match = of_match_node(bcm63xx_spi_of_match, dev->of_node);
+ if (!match)
+ return -EINVAL;
+ bcm63xx_spireg = match->data;
+
+ of_property_read_u32(dev->of_node, "num-cs", &num_cs);
+ if (num_cs > BCM63XX_SPI_MAX_CS) {
+ dev_warn(dev, "unsupported number of cs (%i), reducing to 8\n",
+ num_cs);
+ num_cs = BCM63XX_SPI_MAX_CS;
+ }
+
+ bus_num = -1;
+ } else if (pdev->id_entry->driver_data) {
+ const struct platform_device_id *match = pdev->id_entry;
+
+ bcm63xx_spireg = (const unsigned long *)match->driver_data;
+ bus_num = BCM63XX_SPI_BUS_NUM;
+ } else {
+ return -EINVAL;
+ }
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
@@ -544,8 +572,9 @@ static int bcm63xx_spi_probe(struct plat
goto out_err;
}
- master->bus_num = BCM63XX_SPI_BUS_NUM;
- master->num_chipselect = BCM63XX_SPI_MAX_CS;
+ master->dev.of_node = dev->of_node;
+ master->bus_num = bus_num;
+ master->num_chipselect = num_cs;
master->transfer_one_message = bcm63xx_spi_transfer_one;
master->mode_bits = MODEBITS;
master->bits_per_word_mask = SPI_BPW_MASK(8);
@@ -634,6 +663,7 @@ static struct platform_driver bcm63xx_sp
.driver = {
.name = "bcm63xx-spi",
.pm = &bcm63xx_spi_pm_ops,
+ .of_match_table = bcm63xx_spi_of_match,
},
.id_table = bcm63xx_spi_dev_match,
.probe = bcm63xx_spi_probe,

@ -0,0 +1,35 @@
From d03f23df6ff47898d76f06b3aa5dadcfa1ec8f4f Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Sun, 19 Feb 2017 23:40:22 +0100
Subject: [PATCH 1/3] spi/bcm63xx-hsspi: allow providing clock rate through a
second clock
Instead of requiring the hsspi clock to have a rate, allow using a second
clock for providing the Hz rate, which is probably more correct anyway.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
drivers/spi/spi-bcm63xx-hsspi.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
--- a/drivers/spi/spi-bcm63xx-hsspi.c
+++ b/drivers/spi/spi-bcm63xx-hsspi.c
@@ -351,8 +351,16 @@ static int bcm63xx_hsspi_probe(struct pl
return PTR_ERR(clk);
rate = clk_get_rate(clk);
- if (!rate)
- return -EINVAL;
+ if (!rate) {
+ struct clk *pll_clk = devm_clk_get(dev, "pll");
+
+ if (IS_ERR(pll_clk))
+ return PTR_ERR(pll_clk);
+
+ rate = clk_get_rate(pll_clk);
+ if (!rate)
+ return -EINVAL;
+ }
ret = clk_prepare_enable(clk);
if (ret)

@ -0,0 +1,51 @@
From ff759cc25db31bbb3469abb16a0306f110c4c7fa Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Thu, 10 Sep 2015 14:52:32 +0200
Subject: [PATCH 2/3] dt-bindings: spi: document bcm63xx HS SPI devicetree
bindings
Add documentation for the bindings of the high speed SPI controller found
on newer bcm63xx SoCs.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
.../devicetree/bindings/spi/spi-bcm63xx-hsspi.txt | 33 ++++++++++++++++++++++
1 file changed, 33 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt
@@ -0,0 +1,33 @@
+Binding for Broadcom BCM6328 High Speed SPI controller
+
+Required properties:
+- compatible: must contain of "brcm,bcm6328-hsspi".
+- reg: Base address and size of the controllers memory area.
+- interrupts: Interrupt for the SPI block.
+- clocks: phandles of the SPI clock and the PLL clock.
+- clock-names: must be "hsspi", "pll".
+- #address-cells: <1>, as required by generic SPI binding.
+- #size-cells: <0>, also as required by generic SPI binding.
+
+Optional properties:
+- num-cs: some controllers have less than 8 cs signals. Defaults to 8
+ if absent.
+
+Child nodes as per the generic SPI binding.
+
+Example:
+
+ spi@10001000 {
+ compatible = "brcm,bcm6328-hsspi";
+ reg = <0x10001000 0x600>;
+
+ interrupts = <29>;
+
+ clocks = <&clkctl 9>, <&hsspi_pll>;
+ clock-names = "hsspi", "pll";
+
+ num-cs = <2>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };

@ -0,0 +1,76 @@
From 776041498c2b285a7f745c924e10fc11ef720eae Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Thu, 10 Sep 2015 14:53:53 +0200
Subject: [PATCH 3/3] spi/bcm63xx-hsspi: allow for probing through devicetree
Add required binding support to probe through device tree.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
drivers/spi/spi-bcm63xx-hsspi.c | 23 ++++++++++++++++++++---
1 file changed, 20 insertions(+), 3 deletions(-)
--- a/drivers/spi/spi-bcm63xx-hsspi.c
+++ b/drivers/spi/spi-bcm63xx-hsspi.c
@@ -19,6 +19,7 @@
#include <linux/interrupt.h>
#include <linux/spi/spi.h>
#include <linux/mutex.h>
+#include <linux/of.h>
#define HSSPI_GLOBAL_CTRL_REG 0x0
#define GLOBAL_CTRL_CS_POLARITY_SHIFT 0
@@ -91,6 +92,7 @@
#define HSSPI_MAX_SYNC_CLOCK 30000000
+#define HSSPI_SPI_MAX_CS 8
#define HSSPI_BUS_NUM 1 /* 0 is legacy SPI */
struct bcm63xx_hsspi {
@@ -332,7 +334,7 @@ static int bcm63xx_hsspi_probe(struct pl
struct device *dev = &pdev->dev;
struct clk *clk;
int irq, ret;
- u32 reg, rate;
+ u32 reg, rate, num_cs = HSSPI_SPI_MAX_CS;
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
@@ -382,8 +384,17 @@ static int bcm63xx_hsspi_probe(struct pl
mutex_init(&bs->bus_mutex);
init_completion(&bs->done);
- master->bus_num = HSSPI_BUS_NUM;
- master->num_chipselect = 8;
+ master->dev.of_node = dev->of_node;
+ if (!dev->of_node)
+ master->bus_num = HSSPI_BUS_NUM;
+
+ of_property_read_u32(dev->of_node, "num-cs", &num_cs);
+ if (num_cs > 8) {
+ dev_warn(dev, "unsupported number of cs (%i), reducing to 8\n",
+ num_cs);
+ num_cs = HSSPI_SPI_MAX_CS;
+ }
+ master->num_chipselect = num_cs;
master->setup = bcm63xx_hsspi_setup;
master->transfer_one_message = bcm63xx_hsspi_transfer_one;
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH |
@@ -469,10 +480,16 @@ static int bcm63xx_hsspi_resume(struct d
static SIMPLE_DEV_PM_OPS(bcm63xx_hsspi_pm_ops, bcm63xx_hsspi_suspend,
bcm63xx_hsspi_resume);
+static const struct of_device_id bcm63xx_hsspi_of_match[] = {
+ { .compatible = "brcm,bcm6328-hsspi", },
+ { },
+};
+
static struct platform_driver bcm63xx_hsspi_driver = {
.driver = {
.name = "bcm63xx-hsspi",
.pm = &bcm63xx_hsspi_pm_ops,
+ .of_match_table = bcm63xx_hsspi_of_match,
},
.probe = bcm63xx_hsspi_probe,
.remove = bcm63xx_hsspi_remove,

@ -0,0 +1,35 @@
From 39d2882058345b5994680b8731848a0343878019 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Sat, 4 Feb 2017 12:58:50 +0100
Subject: [PATCH 7/8] MIPS: BCM63XX: do not register SPI controllers
We now register them through DT, so no need to keep them here.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
arch/mips/bcm63xx/boards/board_bcm963xx.c | 7 -------
1 file changed, 7 deletions(-)
--- a/arch/mips/bcm63xx/boards/board_common.c
+++ b/arch/mips/bcm63xx/boards/board_common.c
@@ -29,9 +29,7 @@
#include <bcm63xx_dev_enet.h>
#include <bcm63xx_dev_dsp.h>
#include <bcm63xx_dev_flash.h>
-#include <bcm63xx_dev_hsspi.h>
#include <bcm63xx_dev_pcmcia.h>
-#include <bcm63xx_dev_spi.h>
#include <bcm63xx_dev_usb_ehci.h>
#include <bcm63xx_dev_usb_ohci.h>
#include <bcm63xx_dev_usb_usbd.h>
@@ -250,10 +248,6 @@ int __init board_register_devices(void)
bcm63xx_register_fallback_sprom(&board.fallback_sprom)))
pr_err(PFX "failed to register fallback SPROM\n");
- bcm63xx_spi_register();
-
- bcm63xx_hsspi_register();
-
if (board.num_spis)
spi_register_board_info(board.spis, board.num_spis);

@ -1,6 +1,6 @@
--- a/arch/mips/bcm63xx/boards/board_common.c
+++ b/arch/mips/bcm63xx/boards/board_common.c
@@ -102,6 +102,8 @@ void __init board_early_setup(const stru
@@ -100,6 +100,8 @@ void __init board_early_setup(const stru
if (BCMCPU_IS_6348())
val |= GPIO_MODE_6348_G3_EXT_MII |
GPIO_MODE_6348_G0_EXT_MII;

@ -11,10 +11,11 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
--- a/arch/mips/bcm63xx/dev-flash.c
+++ b/arch/mips/bcm63xx/dev-flash.c
@@ -17,9 +17,12 @@
@@ -17,9 +17,13 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/spi-nor.h>
+#include <linux/of.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
@ -24,7 +25,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
#include <bcm63xx_regs.h>
#include <bcm63xx_io.h>
@@ -66,6 +69,21 @@ void __init bcm63xx_flash_force_phys_bas
@@ -66,6 +70,46 @@ void __init bcm63xx_flash_force_phys_bas
mtd_resources[0].end = end;
}
@ -42,11 +43,36 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+ .platform_data = &bcm63xx_flash_data,
+ },
+};
+
+static void bcm63xx_of_update_spi_flash_speed(struct device_node *np,
+ unsigned int new_hz)
+{
+ struct property *max_hz;
+ __be32 *hz;
+
+ max_hz = kzalloc(sizeof(*max_hz) + sizeof(*hz), GFP_KERNEL);
+ if (!max_hz)
+ return;
+
+ max_hz->name = kstrdup("spi-max-frequency", GFP_KERNEL);
+ if (!max_hz->name) {
+ kfree(max_hz);
+ return;
+ }
+
+ max_hz->value = max_hz + 1;
+ max_hz->length = sizeof(*hz);
+
+ hz = max_hz->value;
+ *hz = cpu_to_be32(new_hz);
+
+ of_update_property(np, max_hz);
+}
+
static int __init bcm63xx_detect_flash_type(void)
{
u32 val;
@@ -73,9 +91,15 @@ static int __init bcm63xx_detect_flash_t
@@ -73,9 +117,15 @@ static int __init bcm63xx_detect_flash_t
switch (bcm63xx_get_cpu_id()) {
case BCM6318_CPU_ID:
/* only support serial flash */
@ -62,7 +88,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
return BCM63XX_FLASH_TYPE_SERIAL;
else
@@ -94,12 +118,20 @@ static int __init bcm63xx_detect_flash_t
@@ -94,12 +144,20 @@ static int __init bcm63xx_detect_flash_t
return BCM63XX_FLASH_TYPE_SERIAL;
case BCM6362_CPU_ID:
val = bcm_misc_readl(MISC_STRAPBUS_6362_REG);
@ -83,7 +109,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
case STRAPBUS_6368_BOOT_SEL_NAND:
return BCM63XX_FLASH_TYPE_NAND;
@@ -110,6 +142,11 @@ static int __init bcm63xx_detect_flash_t
@@ -110,6 +168,11 @@ static int __init bcm63xx_detect_flash_t
}
case BCM63268_CPU_ID:
val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
@ -95,20 +121,35 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
return BCM63XX_FLASH_TYPE_SERIAL;
else
@@ -195,8 +232,14 @@ int __init bcm63xx_flash_register(void)
@@ -176,6 +239,7 @@ void __init bcm63xx_flash_detect(void)
int __init bcm63xx_flash_register(void)
{
+ struct device_node *np;
u32 val;
switch (flash_type) {
@@ -195,8 +259,21 @@ int __init bcm63xx_flash_register(void)
return platform_device_register(&mtd_dev);
case BCM63XX_FLASH_TYPE_SERIAL:
- pr_warn("unsupported serial flash detected\n");
- return -ENODEV;
+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
+ BCMCPU_IS_63268()) {
+ bcm63xx_spi_flash_info[0].bus_num = 1;
+ bcm63xx_spi_flash_info[0].mode = SPI_RX_DUAL;
+ }
+ np = of_find_compatible_node(NULL, NULL, "jedec,spi-nor");
+ if (np) {
+ bcm63xx_of_update_spi_flash_speed(np, bcm63xx_spi_flash_info[0].max_speed_hz);
+ of_node_put(np);
+ return 0;
+ } else {
+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() ||
+ BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
+ bcm63xx_spi_flash_info[0].bus_num = 1;
+ bcm63xx_spi_flash_info[0].mode = SPI_RX_DUAL;
+ }
+
+ return spi_register_board_info(bcm63xx_spi_flash_info,
+ ARRAY_SIZE(bcm63xx_spi_flash_info));
+ return spi_register_board_info(bcm63xx_spi_flash_info,
+ ARRAY_SIZE(bcm63xx_spi_flash_info));
+ }
case BCM63XX_FLASH_TYPE_NAND:
pr_warn("unsupported NAND flash detected\n");
return -ENODEV;

@ -10,7 +10,7 @@ Subject: [PATCH 58/72] BCM63XX: allow providing fixup data in board data
--- a/arch/mips/bcm63xx/boards/board_common.c
+++ b/arch/mips/bcm63xx/boards/board_common.c
@@ -36,6 +36,7 @@
@@ -34,6 +34,7 @@
#include <bcm63xx_dev_usb_ohci.h>
#include <bcm63xx_dev_usb_usbd.h>
#include <board_bcm963xx.h>
@ -18,7 +18,7 @@ Subject: [PATCH 58/72] BCM63XX: allow providing fixup data in board data
#include "board_common.h"
@@ -191,6 +192,7 @@ static struct of_device_id of_ids[] = {
@@ -189,6 +190,7 @@ static struct of_device_id of_ids[] = {
int __init board_register_devices(void)
{
int usbh_ports = 0;
@ -26,7 +26,7 @@ Subject: [PATCH 58/72] BCM63XX: allow providing fixup data in board data
#if CONFIG_OF
if (of_have_populated_dt()) {
@@ -271,6 +273,10 @@ int __init board_register_devices(void)
@@ -265,6 +267,10 @@ int __init board_register_devices(void)
board.ephy_reset_gpio_flags);
}

@ -11,7 +11,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
--- a/arch/mips/bcm63xx/dev-flash.c
+++ b/arch/mips/bcm63xx/dev-flash.c
@@ -249,3 +249,8 @@ int __init bcm63xx_flash_register(void)
@@ -283,3 +283,8 @@ int __init bcm63xx_flash_register(void)
return -ENODEV;
}
}

@ -11,7 +11,7 @@ Subject: [PATCH 69/80] MIPS: BCM63XX: pass caldata info to flash
--- a/arch/mips/bcm63xx/boards/board_common.c
+++ b/arch/mips/bcm63xx/boards/board_common.c
@@ -261,7 +261,7 @@ int __init board_register_devices(void)
@@ -255,7 +255,7 @@ int __init board_register_devices(void)
if (board.num_spis)
spi_register_board_info(board.spis, board.num_spis);
@ -22,7 +22,7 @@ Subject: [PATCH 69/80] MIPS: BCM63XX: pass caldata info to flash
bcm63xx_led_data.leds = board.leds;
--- a/arch/mips/bcm63xx/dev-flash.c
+++ b/arch/mips/bcm63xx/dev-flash.c
@@ -38,12 +38,15 @@ static struct mtd_partition mtd_partitio
@@ -39,12 +39,15 @@ static struct mtd_partition mtd_partitio
}
};
@ -38,7 +38,7 @@ Subject: [PATCH 69/80] MIPS: BCM63XX: pass caldata info to flash
};
static struct resource mtd_resources[] = {
@@ -71,6 +74,7 @@ void __init bcm63xx_flash_force_phys_bas
@@ -72,6 +75,7 @@ void __init bcm63xx_flash_force_phys_bas
static struct flash_platform_data bcm63xx_flash_data = {
.part_probe_types = bcm63xx_part_types,
@ -46,13 +46,14 @@ Subject: [PATCH 69/80] MIPS: BCM63XX: pass caldata info to flash
};
static struct spi_board_info bcm63xx_spi_flash_info[] = {
@@ -211,9 +215,13 @@ void __init bcm63xx_flash_detect(void)
@@ -237,10 +241,14 @@ void __init bcm63xx_flash_detect(void)
}
}
-int __init bcm63xx_flash_register(void)
+int __init bcm63xx_flash_register(int num_caldata, struct ath9k_caldata *caldata)
{
struct device_node *np;
u32 val;
+ unsigned int i;
+

@ -39,7 +39,7 @@
return;
--- a/arch/mips/bcm63xx/boards/board_common.c
+++ b/arch/mips/bcm63xx/boards/board_common.c
@@ -275,7 +275,8 @@ int __init board_register_devices(void)
@@ -269,7 +269,8 @@ int __init board_register_devices(void)
/* register any fixups */
for (i = 0; i < board.has_caldata; i++)

@ -1,6 +1,6 @@
--- a/arch/mips/bcm63xx/boards/board_common.c
+++ b/arch/mips/bcm63xx/boards/board_common.c
@@ -276,7 +276,7 @@ int __init board_register_devices(void)
@@ -270,7 +270,7 @@ int __init board_register_devices(void)
/* register any fixups */
for (i = 0; i < board.has_caldata; i++)
pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,

@ -28,7 +28,7 @@ Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices
obj-y += boards/
--- a/arch/mips/bcm63xx/boards/board_common.c
+++ b/arch/mips/bcm63xx/boards/board_common.c
@@ -37,6 +37,7 @@
@@ -35,6 +35,7 @@
#include <bcm63xx_dev_usb_usbd.h>
#include <board_bcm963xx.h>
#include <pci_ath9k_fixup.h>
@ -36,7 +36,7 @@ Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices
#include "board_common.h"
@@ -274,9 +275,19 @@ int __init board_register_devices(void)
@@ -268,9 +269,19 @@ int __init board_register_devices(void)
}
/* register any fixups */
@ -61,15 +61,15 @@ Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices
}
--- a/arch/mips/bcm63xx/dev-flash.c
+++ b/arch/mips/bcm63xx/dev-flash.c
@@ -215,7 +215,7 @@ void __init bcm63xx_flash_detect(void)
@@ -241,7 +241,7 @@ void __init bcm63xx_flash_detect(void)
}
}
-int __init bcm63xx_flash_register(int num_caldata, struct ath9k_caldata *caldata)
+int __init bcm63xx_flash_register(int num_caldata, struct bcm63xx_caldata *caldata)
{
struct device_node *np;
u32 val;
unsigned int i;
--- /dev/null
+++ b/arch/mips/bcm63xx/pci-rt2x00-fixup.c
@@ -0,0 +1,72 @@

@ -69,7 +69,7 @@
cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
--- a/arch/mips/bcm63xx/dev-flash.c
+++ b/arch/mips/bcm63xx/dev-flash.c
@@ -20,6 +20,7 @@
@@ -21,6 +21,7 @@
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
@ -77,7 +77,7 @@
#include <bcm63xx_cpu.h>
#include <bcm63xx_dev_flash.h>
#include <bcm63xx_dev_hsspi.h>
@@ -234,6 +235,13 @@ int __init bcm63xx_flash_register(int nu
@@ -261,6 +262,13 @@ int __init bcm63xx_flash_register(int nu
val = bcm_mpi_readl(MPI_CSBASE_REG(0));
val &= MPI_CSBASE_BASE_MASK;

@ -33,7 +33,7 @@ Subject: [PATCH] MIPS: BCM63XX: add inventel Livebox support
+obj-$(CONFIG_BOARD_LIVEBOX) += board_livebox.o
--- a/arch/mips/bcm63xx/boards/board_common.c
+++ b/arch/mips/bcm63xx/boards/board_common.c
@@ -59,7 +59,7 @@ void __init board_prom_init(void)
@@ -57,7 +57,7 @@ void __init board_prom_init(void)
if (fw_arg3 == CFE_EPTSEAL)
board_bcm963xx_init();
else

@ -91,7 +91,7 @@ Subject: [PATCH 32/63] bcm63xx: add support for 96368MVWG board.
#endif
--- a/arch/mips/bcm63xx/boards/board_common.c
+++ b/arch/mips/bcm63xx/boards/board_common.c
@@ -86,12 +86,25 @@ void __init board_early_setup(const stru
@@ -84,12 +84,25 @@ void __init board_early_setup(const stru
bcm63xx_pci_enabled = 1;
if (BCMCPU_IS_6348())
val |= GPIO_MODE_6348_G2_PCI;

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