get rid of the specific UART driver and use AMBA PL010
Signed-off-by: Florian Fainelli <florian@openwrt.org> SVN-Revision: 34548v19.07.3_mercusys_ac12_duma
Florian Fainelli
12 years ago
parent
2dee2133c5
commit
afc2b07be1
@ -0,0 +1,2 @@
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config ARM_AMBA
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def_bool y
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@ -0,0 +1,56 @@
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/*
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* ADM8668 minimal clock support
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*
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* Copyright (C) 2012, Florian Fainelli <florian@openwrt.org>
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*
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* Licensed under the terms of the GPLv2
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <adm8668.h>
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struct clk {
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unsigned long rate;
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};
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static struct clk uart_clk = {
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.rate = ADM8668_UARTCLK_FREQ,
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};
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struct clk *clk_get(struct device *dev, const char *id)
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{
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const char *name = dev_name(dev);
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if (!strcmp(name, "apb:uart0"))
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return &uart_clk;
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return ERR_PTR(-ENOENT);
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}
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EXPORT_SYMBOL(clk_get);
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int clk_enable(struct clk *clk)
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{
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable(struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_disable);
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unsigned long clk_get_rate(struct clk *clk)
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{
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return clk->rate;
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}
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EXPORT_SYMBOL(clk_get_rate);
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void clk_put(struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_put);
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@ -1,638 +0,0 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* ADM8668 serial driver, totally ripped the source from BCM63xx and changed
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* all the registers to fit our hardware, and removed all the features that
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* I didn't know because our GPL'd serial driver was way lame.
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*
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* Copyright (C) 2010 Scott Nicholas <neutronscott@scottn.us>
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* Derived directly from bcm63xx_uart
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* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
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*
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*/
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#if defined(CONFIG_SERIAL_ADM8668_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/console.h>
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#include <linux/clk.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/sysrq.h>
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#include <linux/serial.h>
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#include <linux/serial_core.h>
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#include <adm8668.h>
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#define ADM8668_NR_UARTS 1
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static struct uart_port ports[ADM8668_NR_UARTS];
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/*
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* handy uart register accessor
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*/
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static inline unsigned int adm_uart_readl(struct uart_port *port,
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unsigned int offset)
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{
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return (*(volatile unsigned int *)(port->membase + offset));
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}
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static inline void adm_uart_writel(struct uart_port *port,
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unsigned int value, unsigned int offset)
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{
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(*((volatile unsigned int *)(port->membase + offset))) = value;
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}
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/*
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* serial core request to check if uart tx fifo is empty
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*/
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static unsigned int adm_uart_tx_empty(struct uart_port *port)
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{
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/* we always wait for completion, no buffer is made... */
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return 1;
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}
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/*
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* serial core request to set RTS and DTR pin state and loopback mode
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*/
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static void adm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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}
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/*
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* serial core request to return RI, CTS, DCD and DSR pin state
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*/
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static unsigned int adm_uart_get_mctrl(struct uart_port *port)
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{
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return 0;
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}
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/*
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* serial core request to disable tx ASAP (used for flow control)
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*/
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static void adm_uart_stop_tx(struct uart_port *port)
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{
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unsigned int val;
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val = adm_uart_readl(port, UART_CR_REG);
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val &= ~(UART_TX_INT_EN);
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adm_uart_writel(port, val, UART_CR_REG);
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}
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/*
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* serial core request to (re)enable tx
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*/
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static void adm_uart_start_tx(struct uart_port *port)
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{
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unsigned int val;
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val = adm_uart_readl(port, UART_CR_REG);
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val |= UART_TX_INT_EN;
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adm_uart_writel(port, val, UART_CR_REG);
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}
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/*
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* serial core request to stop rx, called before port shutdown
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*/
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static void adm_uart_stop_rx(struct uart_port *port)
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{
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unsigned int val;
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val = adm_uart_readl(port, UART_CR_REG);
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val &= ~UART_RX_INT_EN;
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adm_uart_writel(port, val, UART_CR_REG);
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}
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/*
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* serial core request to enable modem status interrupt reporting
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*/
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static void adm_uart_enable_ms(struct uart_port *port)
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{
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}
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/*
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* serial core request to start/stop emitting break char
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*/
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static void adm_uart_break_ctl(struct uart_port *port, int ctl)
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{
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}
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/*
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* return port type in string format
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*/
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static const char *adm_uart_type(struct uart_port *port)
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{
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return (port->type == PORT_ADM8668) ? "adm8668_uart" : NULL;
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}
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/*
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* read all chars in rx fifo and send them to core
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*/
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static void adm_uart_do_rx(struct uart_port *port)
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{
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struct tty_struct *tty;
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unsigned int max_count;
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/* limit number of char read in interrupt, should not be
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* higher than fifo size anyway since we're much faster than
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* serial port */
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max_count = 32;
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tty = port->state->port.tty;
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do {
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unsigned int iestat, c, cstat;
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char flag;
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/* get overrun/fifo empty information from ier
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* register */
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iestat = adm_uart_readl(port, UART_FR_REG);
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if (iestat & UART_RX_FIFO_EMPTY)
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break;
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/* recieve status */
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cstat = adm_uart_readl(port, UART_RSR_REG);
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/* clear errors */
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adm_uart_writel(port, cstat, UART_RSR_REG);
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c = adm_uart_readl(port, UART_DR_REG);
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port->icount.rx++;
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flag = TTY_NORMAL;
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if (unlikely((cstat & UART_RX_STATUS_MASK))) {
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/* do stats first */
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if (cstat & UART_BREAK_ERR) {
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port->icount.brk++;
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if (uart_handle_break(port))
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continue;
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}
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if (cstat & UART_PARITY_ERR)
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port->icount.parity++;
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if (cstat & UART_FRAMING_ERR)
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port->icount.frame++;
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if (cstat & UART_OVERRUN_ERR) {
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port->icount.overrun++;
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tty_insert_flip_char(tty, 0, TTY_OVERRUN);
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}
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/* update flag wrt read_status_mask */
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cstat &= port->read_status_mask;
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if (cstat & UART_BREAK_ERR)
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flag = TTY_BREAK;
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if (cstat & UART_FRAMING_ERR)
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flag = TTY_FRAME;
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if (cstat & UART_PARITY_ERR)
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flag = TTY_PARITY;
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}
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if (uart_handle_sysrq_char(port, c))
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continue;
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/* fixthis */
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if ((cstat & port->ignore_status_mask) == 0)
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tty_insert_flip_char(tty, c, flag);
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} while (max_count--);
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tty_flip_buffer_push(tty);
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}
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/*
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* fill tx fifo with chars to send, stop when fifo is about to be full
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* or when all chars have been sent.
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*/
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static void adm_uart_do_tx(struct uart_port *port)
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{
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struct circ_buf *xmit;
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if (port->x_char) {
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adm_uart_writel(port, port->x_char, UART_DR_REG);
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port->icount.tx++;
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port->x_char = 0;
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return;
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}
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if (uart_tx_stopped(port))
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adm_uart_stop_tx(port);
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xmit = &port->state->xmit;
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if (uart_circ_empty(xmit))
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goto txq_empty;
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do
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{
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while ((adm_uart_readl(port, UART_FR_REG) & UART_TX_FIFO_FULL) != 0)
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;
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adm_uart_writel(port, xmit->buf[xmit->tail], UART_DR_REG);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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if (uart_circ_empty(xmit))
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break;
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} while (1);
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit))
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goto txq_empty;
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return;
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txq_empty:
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adm_uart_stop_tx(port);
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}
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/*
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* process uart interrupt
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*/
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static irqreturn_t adm_uart_interrupt(int irq, void *dev_id)
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{
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struct uart_port *port;
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unsigned int irqstat;
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port = dev_id;
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spin_lock(&port->lock);
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irqstat = adm_uart_readl(port, UART_IIR_REG);
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if (irqstat & (UART_RX_INT|UART_RX_TIMEOUT_INT)) {
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adm_uart_do_rx(port);
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}
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if (irqstat & UART_TX_INT) {
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adm_uart_do_tx(port);
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}
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spin_unlock(&port->lock);
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return IRQ_HANDLED;
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}
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/*
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* enable rx & tx operation on uart
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*/
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static void adm_uart_enable(struct uart_port *port)
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{
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unsigned int val;
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val = adm_uart_readl(port, UART_CR_REG);
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// BREAK_INT too
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val |= (UART_RX_INT_EN | UART_RX_TIMEOUT_INT_EN);
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adm_uart_writel(port, val, UART_CR_REG);
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}
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/*
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* disable rx & tx operation on uart
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*/
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static void adm_uart_disable(struct uart_port *port)
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{
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unsigned int val;
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val = adm_uart_readl(port, UART_CR_REG);
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val &= ~(UART_TX_INT_EN | UART_RX_INT_EN | UART_RX_TIMEOUT_INT_EN);
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adm_uart_writel(port, val, UART_CR_REG);
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}
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/*
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* clear all unread data in rx fifo and unsent data in tx fifo
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*/
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static void adm_uart_flush(struct uart_port *port)
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{
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/* read any pending char to make sure all irq status are
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* cleared */
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(void)adm_uart_readl(port, UART_DR_REG);
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}
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/*
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* serial core request to initialize uart and start rx operation
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*/
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static int adm_uart_startup(struct uart_port *port)
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{
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int ret;
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/* clear any pending external input interrupt */
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(void)adm_uart_readl(port, UART_IIR_REG);
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/* register irq and enable rx interrupts */
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ret = request_irq(port->irq, adm_uart_interrupt, 0,
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adm_uart_type(port), port);
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if (ret)
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return ret;
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adm_uart_enable(port);
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return 0;
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}
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/*
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* serial core request to flush & disable uart
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*/
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static void adm_uart_shutdown(struct uart_port *port)
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{
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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// adm_uart_writel(port, 0, UART_CR_REG);
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spin_unlock_irqrestore(&port->lock, flags);
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adm_uart_disable(port);
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adm_uart_flush(port);
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free_irq(port->irq, port);
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}
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/*
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* serial core request to change current uart setting
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*/
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static void adm_uart_set_termios(struct uart_port *port,
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struct ktermios *new,
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struct ktermios *old)
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{
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port->ignore_status_mask = 0;
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uart_update_timeout(port, new->c_cflag, 115200);
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}
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/*
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* serial core request to claim uart iomem
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*/
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static int adm_uart_request_port(struct uart_port *port)
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{
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unsigned int size = 0xf;
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if (!request_mem_region(port->mapbase, size, "adm8668")) {
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dev_err(port->dev, "Memory region busy\n");
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return -EBUSY;
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}
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port->membase = ioremap(port->mapbase, size);
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if (!port->membase) {
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dev_err(port->dev, "Unable to map registers\n");
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release_mem_region(port->mapbase, size);
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return -EBUSY;
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}
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return 0;
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}
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/*
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* serial core request to release uart iomem
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*/
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static void adm_uart_release_port(struct uart_port *port)
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{
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release_mem_region(port->mapbase, 0xf);
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iounmap(port->membase);
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}
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/*
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* serial core request to do any port required autoconfiguration
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*/
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static void adm_uart_config_port(struct uart_port *port, int flags)
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{
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if (flags & UART_CONFIG_TYPE) {
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if (adm_uart_request_port(port))
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return;
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port->type = PORT_ADM8668;
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}
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}
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/*
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* serial core request to check that port information in serinfo are
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* suitable
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*/
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static int adm_uart_verify_port(struct uart_port *port,
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struct serial_struct *serinfo)
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{
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if (port->type != PORT_ADM8668)
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return -EINVAL;
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if (port->irq != serinfo->irq)
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return -EINVAL;
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if (port->iotype != serinfo->io_type)
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return -EINVAL;
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if (port->mapbase != (unsigned long)serinfo->iomem_base)
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return -EINVAL;
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return 0;
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}
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/* serial core callbacks */
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static struct uart_ops adm_uart_ops = {
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.tx_empty = adm_uart_tx_empty,
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.get_mctrl = adm_uart_get_mctrl,
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.set_mctrl = adm_uart_set_mctrl,
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.start_tx = adm_uart_start_tx,
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.stop_tx = adm_uart_stop_tx,
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.stop_rx = adm_uart_stop_rx,
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.enable_ms = adm_uart_enable_ms,
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.break_ctl = adm_uart_break_ctl,
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.startup = adm_uart_startup,
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.shutdown = adm_uart_shutdown,
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.set_termios = adm_uart_set_termios,
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.type = adm_uart_type,
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.release_port = adm_uart_release_port,
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.request_port = adm_uart_request_port,
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.config_port = adm_uart_config_port,
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.verify_port = adm_uart_verify_port,
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};
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#ifdef CONFIG_SERIAL_ADM8668_CONSOLE
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static inline void wait_for_xmitr(struct uart_port *port)
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{
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while ((adm_uart_readl(port, UART_FR_REG) & UART_TX_FIFO_FULL) != 0)
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;
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}
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/*
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* output given char
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*/
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static void adm_console_putchar(struct uart_port *port, int ch)
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{
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wait_for_xmitr(port);
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adm_uart_writel(port, ch, UART_DR_REG);
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}
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/*
|
||||
* console core request to output given string
|
||||
*/
|
||||
static void adm_console_write(struct console *co, const char *s,
|
||||
unsigned int count)
|
||||
{
|
||||
struct uart_port *port;
|
||||
unsigned long flags;
|
||||
int locked;
|
||||
|
||||
port = &ports[co->index];
|
||||
|
||||
local_irq_save(flags);
|
||||
if (port->sysrq) {
|
||||
/* adm_uart_interrupt() already took the lock */
|
||||
locked = 0;
|
||||
} else if (oops_in_progress) {
|
||||
locked = spin_trylock(&port->lock);
|
||||
} else {
|
||||
spin_lock(&port->lock);
|
||||
locked = 1;
|
||||
}
|
||||
|
||||
/* call helper to deal with \r\n */
|
||||
uart_console_write(port, s, count, adm_console_putchar);
|
||||
|
||||
/* and wait for char to be transmitted */
|
||||
wait_for_xmitr(port);
|
||||
|
||||
if (locked)
|
||||
spin_unlock(&port->lock);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
/*
|
||||
* console core request to setup given console, find matching uart
|
||||
* port and setup it.
|
||||
*/
|
||||
static int adm_console_setup(struct console *co, char *options)
|
||||
{
|
||||
struct uart_port *port;
|
||||
int baud = 115200;
|
||||
int bits = 8;
|
||||
int parity = 'n';
|
||||
int flow = 'n';
|
||||
|
||||
if (co->index < 0 || co->index >= ADM8668_NR_UARTS)
|
||||
return -EINVAL;
|
||||
port = &ports[co->index];
|
||||
if (!port->membase)
|
||||
return -ENODEV;
|
||||
|
||||
if (options)
|
||||
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
||||
|
||||
return uart_set_options(port, co, baud, parity, bits, flow);
|
||||
}
|
||||
|
||||
static struct uart_driver adm_uart_driver;
|
||||
|
||||
static struct console adm8668_console = {
|
||||
.name = "ttyS",
|
||||
.write = adm_console_write,
|
||||
.device = uart_console_device,
|
||||
.setup = adm_console_setup,
|
||||
.flags = CON_PRINTBUFFER,
|
||||
.index = -1,
|
||||
.data = &adm_uart_driver,
|
||||
};
|
||||
|
||||
static int __init adm8668_console_init(void)
|
||||
{
|
||||
register_console(&adm8668_console);
|
||||
return 0;
|
||||
}
|
||||
|
||||
console_initcall(adm8668_console_init);
|
||||
|
||||
#define ADM8668_CONSOLE (&adm8668_console)
|
||||
#else
|
||||
#define ADM8668_CONSOLE NULL
|
||||
#endif /* CONFIG_SERIAL_ADM8668_CONSOLE */
|
||||
|
||||
static struct uart_driver adm_uart_driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.driver_name = "adm8668_uart",
|
||||
.dev_name = "ttyS",
|
||||
.major = TTY_MAJOR,
|
||||
.minor = 64,
|
||||
.nr = 1,
|
||||
.cons = ADM8668_CONSOLE,
|
||||
};
|
||||
|
||||
/*
|
||||
* platform driver probe/remove callback
|
||||
*/
|
||||
static int __devinit adm_uart_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *res_mem, *res_irq;
|
||||
struct uart_port *port;
|
||||
int ret;
|
||||
|
||||
if (pdev->id < 0 || pdev->id >= ADM8668_NR_UARTS)
|
||||
return -EINVAL;
|
||||
|
||||
if (ports[pdev->id].membase)
|
||||
return -EBUSY;
|
||||
|
||||
res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!res_mem)
|
||||
return -ENODEV;
|
||||
|
||||
res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
||||
if (!res_irq)
|
||||
return -ENODEV;
|
||||
|
||||
port = &ports[pdev->id];
|
||||
memset(port, 0, sizeof(*port));
|
||||
port->iotype = UPIO_MEM;
|
||||
port->mapbase = res_mem->start;
|
||||
port->irq = res_irq->start;
|
||||
port->ops = &adm_uart_ops;
|
||||
port->flags = UPF_BOOT_AUTOCONF;
|
||||
port->dev = &pdev->dev;
|
||||
port->fifosize = 8;
|
||||
port->uartclk = ADM8668_UARTCLK_FREQ;
|
||||
|
||||
ret = uart_add_one_port(&adm_uart_driver, port);
|
||||
if (ret) {
|
||||
ports[pdev->id].membase = 0;
|
||||
return ret;
|
||||
}
|
||||
platform_set_drvdata(pdev, port);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __devexit adm_uart_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct uart_port *port;
|
||||
|
||||
port = platform_get_drvdata(pdev);
|
||||
uart_remove_one_port(&adm_uart_driver, port);
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
/* mark port as free */
|
||||
ports[pdev->id].membase = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* platform driver stuff
|
||||
*/
|
||||
static struct platform_driver adm_uart_platform_driver = {
|
||||
.probe = adm_uart_probe,
|
||||
.remove = __devexit_p(adm_uart_remove),
|
||||
.driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = "adm8668_uart",
|
||||
},
|
||||
};
|
||||
|
||||
static int __init adm_uart_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = uart_register_driver(&adm_uart_driver);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = platform_driver_register(&adm_uart_platform_driver);
|
||||
if (ret)
|
||||
uart_unregister_driver(&adm_uart_driver);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __exit adm_uart_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&adm_uart_platform_driver);
|
||||
uart_unregister_driver(&adm_uart_driver);
|
||||
}
|
||||
|
||||
module_init(adm_uart_init);
|
||||
module_exit(adm_uart_exit);
|
||||
|
||||
MODULE_AUTHOR("Scott Nicholas <neutronscott@scottn.us>");
|
||||
MODULE_DESCRIPTION("ADM8668 integrated uart driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
@ -0,0 +1,56 @@
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
/* DO NOT EDIT!! - this file automatically generated
|
||||
* from .s file by awk -f s2h.awk
|
||||
*/
|
||||
/* Size definitions
|
||||
* Copyright (C) ARM Limited 1998. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef __sizes_h
|
||||
#define __sizes_h 1
|
||||
|
||||
/* handy sizes */
|
||||
#define SZ_16 0x00000010
|
||||
#define SZ_256 0x00000100
|
||||
#define SZ_512 0x00000200
|
||||
|
||||
#define SZ_1K 0x00000400
|
||||
#define SZ_4K 0x00001000
|
||||
#define SZ_8K 0x00002000
|
||||
#define SZ_16K 0x00004000
|
||||
#define SZ_64K 0x00010000
|
||||
#define SZ_128K 0x00020000
|
||||
#define SZ_256K 0x00040000
|
||||
#define SZ_512K 0x00080000
|
||||
|
||||
#define SZ_1M 0x00100000
|
||||
#define SZ_2M 0x00200000
|
||||
#define SZ_4M 0x00400000
|
||||
#define SZ_8M 0x00800000
|
||||
#define SZ_16M 0x01000000
|
||||
#define SZ_32M 0x02000000
|
||||
#define SZ_64M 0x04000000
|
||||
#define SZ_128M 0x08000000
|
||||
#define SZ_256M 0x10000000
|
||||
#define SZ_512M 0x20000000
|
||||
|
||||
#define SZ_1G 0x40000000
|
||||
#define SZ_2G 0x80000000
|
||||
|
||||
#endif
|
||||
|
||||
/* END */
|
||||
@ -1,40 +0,0 @@
|
||||
--- a/drivers/tty/serial/Kconfig
|
||||
+++ b/drivers/tty/serial/Kconfig
|
||||
@@ -1192,6 +1192,25 @@ config SERIAL_BCM63XX_CONSOLE
|
||||
If you have enabled the serial port on the bcm63xx CPU
|
||||
you can make it the console by answering Y to this option.
|
||||
|
||||
+config SERIAL_ADM8668
|
||||
+ tristate "ADM8668 serial port support"
|
||||
+ select SERIAL_CORE
|
||||
+ depends on ADM8668
|
||||
+ help
|
||||
+ If you have an adm8668 CPU, you can enable its onboard
|
||||
+ serial port by enabling this options.
|
||||
+
|
||||
+ To compile this driver as a module, choose M here: the
|
||||
+ module will be called adm8668_uart.
|
||||
+
|
||||
+config SERIAL_ADM8668_CONSOLE
|
||||
+ bool "Console on adm8668 serial port"
|
||||
+ depends on SERIAL_ADM8668=y
|
||||
+ select SERIAL_CORE_CONSOLE
|
||||
+ help
|
||||
+ If you have enabled the serial port on the adm8668 CPU
|
||||
+ you can make it the console by answering Y to this option.
|
||||
+
|
||||
config SERIAL_GRLIB_GAISLER_APBUART
|
||||
tristate "GRLIB APBUART serial support"
|
||||
depends on OF && SPARC
|
||||
--- a/include/linux/serial_core.h
|
||||
+++ b/include/linux/serial_core.h
|
||||
@@ -211,6 +211,9 @@
|
||||
#define PORT_AR933X 99
|
||||
|
||||
|
||||
+/* ADM8668 UART */
|
||||
+#define PORT_ADM8668 100
|
||||
+
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <linux/compiler.h>
|
||||
@ -0,0 +1,378 @@
|
||||
--- a/drivers/tty/serial/amba-pl010.c
|
||||
+++ b/drivers/tty/serial/amba-pl010.c
|
||||
@@ -49,11 +49,10 @@
|
||||
|
||||
#include <asm/io.h>
|
||||
|
||||
-#define UART_NR 8
|
||||
-
|
||||
#define SERIAL_AMBA_MAJOR 204
|
||||
#define SERIAL_AMBA_MINOR 16
|
||||
-#define SERIAL_AMBA_NR UART_NR
|
||||
+#define SERIAL_AMBA_NR CONFIG_SERIAL_AMBA_PL010_NUMPORTS
|
||||
+#define SERIAL_AMBA_NAME CONFIG_SERIAL_AMBA_PL010_PORTNAME
|
||||
|
||||
#define AMBA_ISR_PASS_LIMIT 256
|
||||
|
||||
@@ -79,9 +78,9 @@ static void pl010_stop_tx(struct uart_po
|
||||
struct uart_amba_port *uap = (struct uart_amba_port *)port;
|
||||
unsigned int cr;
|
||||
|
||||
- cr = readb(uap->port.membase + UART010_CR);
|
||||
+ cr = __raw_readl(uap->port.membase + UART010_CR);
|
||||
cr &= ~UART010_CR_TIE;
|
||||
- writel(cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(cr, uap->port.membase + UART010_CR);
|
||||
}
|
||||
|
||||
static void pl010_start_tx(struct uart_port *port)
|
||||
@@ -89,9 +88,9 @@ static void pl010_start_tx(struct uart_p
|
||||
struct uart_amba_port *uap = (struct uart_amba_port *)port;
|
||||
unsigned int cr;
|
||||
|
||||
- cr = readb(uap->port.membase + UART010_CR);
|
||||
+ cr = __raw_readl(uap->port.membase + UART010_CR);
|
||||
cr |= UART010_CR_TIE;
|
||||
- writel(cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(cr, uap->port.membase + UART010_CR);
|
||||
}
|
||||
|
||||
static void pl010_stop_rx(struct uart_port *port)
|
||||
@@ -99,9 +98,9 @@ static void pl010_stop_rx(struct uart_po
|
||||
struct uart_amba_port *uap = (struct uart_amba_port *)port;
|
||||
unsigned int cr;
|
||||
|
||||
- cr = readb(uap->port.membase + UART010_CR);
|
||||
+ cr = __raw_readl(uap->port.membase + UART010_CR);
|
||||
cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
|
||||
- writel(cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(cr, uap->port.membase + UART010_CR);
|
||||
}
|
||||
|
||||
static void pl010_enable_ms(struct uart_port *port)
|
||||
@@ -109,9 +108,9 @@ static void pl010_enable_ms(struct uart_
|
||||
struct uart_amba_port *uap = (struct uart_amba_port *)port;
|
||||
unsigned int cr;
|
||||
|
||||
- cr = readb(uap->port.membase + UART010_CR);
|
||||
+ cr = __raw_readl(uap->port.membase + UART010_CR);
|
||||
cr |= UART010_CR_MSIE;
|
||||
- writel(cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(cr, uap->port.membase + UART010_CR);
|
||||
}
|
||||
|
||||
static void pl010_rx_chars(struct uart_amba_port *uap)
|
||||
@@ -119,9 +118,9 @@ static void pl010_rx_chars(struct uart_a
|
||||
struct tty_struct *tty = uap->port.state->port.tty;
|
||||
unsigned int status, ch, flag, rsr, max_count = 256;
|
||||
|
||||
- status = readb(uap->port.membase + UART01x_FR);
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
while (UART_RX_DATA(status) && max_count--) {
|
||||
- ch = readb(uap->port.membase + UART01x_DR);
|
||||
+ ch = __raw_readl(uap->port.membase + UART01x_DR);
|
||||
flag = TTY_NORMAL;
|
||||
|
||||
uap->port.icount.rx++;
|
||||
@@ -130,9 +129,9 @@ static void pl010_rx_chars(struct uart_a
|
||||
* Note that the error handling code is
|
||||
* out of the main execution path
|
||||
*/
|
||||
- rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
|
||||
+ rsr = __raw_readl(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
|
||||
if (unlikely(rsr & UART01x_RSR_ANY)) {
|
||||
- writel(0, uap->port.membase + UART01x_ECR);
|
||||
+ __raw_writel(0, uap->port.membase + UART01x_ECR);
|
||||
|
||||
if (rsr & UART01x_RSR_BE) {
|
||||
rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
|
||||
@@ -162,7 +161,7 @@ static void pl010_rx_chars(struct uart_a
|
||||
uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
|
||||
|
||||
ignore_char:
|
||||
- status = readb(uap->port.membase + UART01x_FR);
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
}
|
||||
spin_unlock(&uap->port.lock);
|
||||
tty_flip_buffer_push(tty);
|
||||
@@ -175,7 +174,7 @@ static void pl010_tx_chars(struct uart_a
|
||||
int count;
|
||||
|
||||
if (uap->port.x_char) {
|
||||
- writel(uap->port.x_char, uap->port.membase + UART01x_DR);
|
||||
+ __raw_writel(uap->port.x_char, uap->port.membase + UART01x_DR);
|
||||
uap->port.icount.tx++;
|
||||
uap->port.x_char = 0;
|
||||
return;
|
||||
@@ -187,7 +186,7 @@ static void pl010_tx_chars(struct uart_a
|
||||
|
||||
count = uap->port.fifosize >> 1;
|
||||
do {
|
||||
- writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
|
||||
+ __raw_writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
|
||||
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
|
||||
uap->port.icount.tx++;
|
||||
if (uart_circ_empty(xmit))
|
||||
@@ -205,9 +204,9 @@ static void pl010_modem_status(struct ua
|
||||
{
|
||||
unsigned int status, delta;
|
||||
|
||||
- writel(0, uap->port.membase + UART010_ICR);
|
||||
+ __raw_writel(0, uap->port.membase + UART010_ICR);
|
||||
|
||||
- status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
|
||||
|
||||
delta = status ^ uap->old_status;
|
||||
uap->old_status = status;
|
||||
@@ -235,7 +234,7 @@ static irqreturn_t pl010_int(int irq, vo
|
||||
|
||||
spin_lock(&uap->port.lock);
|
||||
|
||||
- status = readb(uap->port.membase + UART010_IIR);
|
||||
+ status = __raw_readl(uap->port.membase + UART010_IIR);
|
||||
if (status) {
|
||||
do {
|
||||
if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
|
||||
@@ -248,7 +247,7 @@ static irqreturn_t pl010_int(int irq, vo
|
||||
if (pass_counter-- == 0)
|
||||
break;
|
||||
|
||||
- status = readb(uap->port.membase + UART010_IIR);
|
||||
+ status = __raw_readl(uap->port.membase + UART010_IIR);
|
||||
} while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
|
||||
UART010_IIR_TIS));
|
||||
handled = 1;
|
||||
@@ -262,7 +261,7 @@ static irqreturn_t pl010_int(int irq, vo
|
||||
static unsigned int pl010_tx_empty(struct uart_port *port)
|
||||
{
|
||||
struct uart_amba_port *uap = (struct uart_amba_port *)port;
|
||||
- unsigned int status = readb(uap->port.membase + UART01x_FR);
|
||||
+ unsigned int status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
|
||||
}
|
||||
|
||||
@@ -272,7 +271,7 @@ static unsigned int pl010_get_mctrl(stru
|
||||
unsigned int result = 0;
|
||||
unsigned int status;
|
||||
|
||||
- status = readb(uap->port.membase + UART01x_FR);
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
if (status & UART01x_FR_DCD)
|
||||
result |= TIOCM_CAR;
|
||||
if (status & UART01x_FR_DSR)
|
||||
@@ -298,12 +297,12 @@ static void pl010_break_ctl(struct uart_
|
||||
unsigned int lcr_h;
|
||||
|
||||
spin_lock_irqsave(&uap->port.lock, flags);
|
||||
- lcr_h = readb(uap->port.membase + UART010_LCRH);
|
||||
+ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
|
||||
if (break_state == -1)
|
||||
lcr_h |= UART01x_LCRH_BRK;
|
||||
else
|
||||
lcr_h &= ~UART01x_LCRH_BRK;
|
||||
- writel(lcr_h, uap->port.membase + UART010_LCRH);
|
||||
+ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
|
||||
spin_unlock_irqrestore(&uap->port.lock, flags);
|
||||
}
|
||||
|
||||
@@ -335,12 +334,12 @@ static int pl010_startup(struct uart_por
|
||||
/*
|
||||
* initialise the old status of the modem signals
|
||||
*/
|
||||
- uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
|
||||
+ uap->old_status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
|
||||
|
||||
/*
|
||||
* Finally, enable interrupts
|
||||
*/
|
||||
- writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
|
||||
+ __raw_writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
|
||||
uap->port.membase + UART010_CR);
|
||||
|
||||
return 0;
|
||||
@@ -365,10 +364,10 @@ static void pl010_shutdown(struct uart_p
|
||||
/*
|
||||
* disable all interrupts, disable the port
|
||||
*/
|
||||
- writel(0, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(0, uap->port.membase + UART010_CR);
|
||||
|
||||
/* disable break condition and fifos */
|
||||
- writel(readb(uap->port.membase + UART010_LCRH) &
|
||||
+ __raw_writel(__raw_readl(uap->port.membase + UART010_LCRH) &
|
||||
~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
|
||||
uap->port.membase + UART010_LCRH);
|
||||
|
||||
@@ -391,7 +390,7 @@ pl010_set_termios(struct uart_port *port
|
||||
/*
|
||||
* Ask the core to calculate the divisor for us.
|
||||
*/
|
||||
- baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
|
||||
+ baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
|
||||
quot = uart_get_divisor(port, baud);
|
||||
|
||||
switch (termios->c_cflag & CSIZE) {
|
||||
@@ -454,25 +453,25 @@ pl010_set_termios(struct uart_port *port
|
||||
uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
|
||||
|
||||
/* first, disable everything */
|
||||
- old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
|
||||
+ old_cr = __raw_readl(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
|
||||
|
||||
if (UART_ENABLE_MS(port, termios->c_cflag))
|
||||
old_cr |= UART010_CR_MSIE;
|
||||
|
||||
- writel(0, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(0, uap->port.membase + UART010_CR);
|
||||
|
||||
/* Set baud rate */
|
||||
quot -= 1;
|
||||
- writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
|
||||
- writel(quot & 0xff, uap->port.membase + UART010_LCRL);
|
||||
+ __raw_writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
|
||||
+ __raw_writel(quot & 0xff, uap->port.membase + UART010_LCRL);
|
||||
|
||||
/*
|
||||
* ----------v----------v----------v----------v-----
|
||||
* NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
|
||||
* ----------^----------^----------^----------^-----
|
||||
*/
|
||||
- writel(lcr_h, uap->port.membase + UART010_LCRH);
|
||||
- writel(old_cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
|
||||
+ __raw_writel(old_cr, uap->port.membase + UART010_CR);
|
||||
|
||||
spin_unlock_irqrestore(&uap->port.lock, flags);
|
||||
}
|
||||
@@ -554,7 +553,7 @@ static struct uart_ops amba_pl010_pops =
|
||||
.verify_port = pl010_verify_port,
|
||||
};
|
||||
|
||||
-static struct uart_amba_port *amba_ports[UART_NR];
|
||||
+static struct uart_amba_port *amba_ports[SERIAL_AMBA_NR];
|
||||
|
||||
#ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
|
||||
|
||||
@@ -564,10 +563,10 @@ static void pl010_console_putchar(struct
|
||||
unsigned int status;
|
||||
|
||||
do {
|
||||
- status = readb(uap->port.membase + UART01x_FR);
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
barrier();
|
||||
} while (!UART_TX_READY(status));
|
||||
- writel(ch, uap->port.membase + UART01x_DR);
|
||||
+ __raw_writel(ch, uap->port.membase + UART01x_DR);
|
||||
}
|
||||
|
||||
static void
|
||||
@@ -581,8 +580,8 @@ pl010_console_write(struct console *co,
|
||||
/*
|
||||
* First save the CR then disable the interrupts
|
||||
*/
|
||||
- old_cr = readb(uap->port.membase + UART010_CR);
|
||||
- writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
|
||||
+ old_cr = __raw_readl(uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
|
||||
|
||||
uart_console_write(&uap->port, s, count, pl010_console_putchar);
|
||||
|
||||
@@ -591,10 +590,10 @@ pl010_console_write(struct console *co,
|
||||
* and restore the TCR
|
||||
*/
|
||||
do {
|
||||
- status = readb(uap->port.membase + UART01x_FR);
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
barrier();
|
||||
} while (status & UART01x_FR_BUSY);
|
||||
- writel(old_cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(old_cr, uap->port.membase + UART010_CR);
|
||||
|
||||
clk_disable(uap->clk);
|
||||
}
|
||||
@@ -603,9 +602,9 @@ static void __init
|
||||
pl010_console_get_options(struct uart_amba_port *uap, int *baud,
|
||||
int *parity, int *bits)
|
||||
{
|
||||
- if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
|
||||
+ if (__raw_readl(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
|
||||
unsigned int lcr_h, quot;
|
||||
- lcr_h = readb(uap->port.membase + UART010_LCRH);
|
||||
+ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
|
||||
|
||||
*parity = 'n';
|
||||
if (lcr_h & UART01x_LCRH_PEN) {
|
||||
@@ -620,8 +619,8 @@ pl010_console_get_options(struct uart_am
|
||||
else
|
||||
*bits = 8;
|
||||
|
||||
- quot = readb(uap->port.membase + UART010_LCRL) |
|
||||
- readb(uap->port.membase + UART010_LCRM) << 8;
|
||||
+ quot = __raw_readl(uap->port.membase + UART010_LCRL) |
|
||||
+ __raw_readl(uap->port.membase + UART010_LCRM) << 8;
|
||||
*baud = uap->port.uartclk / (16 * (quot + 1));
|
||||
}
|
||||
}
|
||||
@@ -640,7 +639,7 @@ static int __init pl010_console_setup(st
|
||||
* if so, search for the first available port that does have
|
||||
* console support.
|
||||
*/
|
||||
- if (co->index >= UART_NR)
|
||||
+ if (co->index >= SERIAL_AMBA_NR)
|
||||
co->index = 0;
|
||||
uap = amba_ports[co->index];
|
||||
if (!uap)
|
||||
@@ -662,7 +661,7 @@ static int __init pl010_console_setup(st
|
||||
|
||||
static struct uart_driver amba_reg;
|
||||
static struct console amba_console = {
|
||||
- .name = "ttyAM",
|
||||
+ .name = SERIAL_AMBA_NAME,
|
||||
.write = pl010_console_write,
|
||||
.device = uart_console_device,
|
||||
.setup = pl010_console_setup,
|
||||
@@ -678,11 +677,11 @@ static struct console amba_console = {
|
||||
|
||||
static struct uart_driver amba_reg = {
|
||||
.owner = THIS_MODULE,
|
||||
- .driver_name = "ttyAM",
|
||||
- .dev_name = "ttyAM",
|
||||
+ .driver_name = SERIAL_AMBA_NAME,
|
||||
+ .dev_name = SERIAL_AMBA_NAME,
|
||||
.major = SERIAL_AMBA_MAJOR,
|
||||
.minor = SERIAL_AMBA_MINOR,
|
||||
- .nr = UART_NR,
|
||||
+ .nr = SERIAL_AMBA_NR,
|
||||
.cons = AMBA_CONSOLE,
|
||||
};
|
||||
|
||||
--- a/drivers/tty/serial/Kconfig
|
||||
+++ b/drivers/tty/serial/Kconfig
|
||||
@@ -16,10 +16,25 @@ config SERIAL_AMBA_PL010
|
||||
help
|
||||
This selects the ARM(R) AMBA(R) PrimeCell PL010 UART. If you have
|
||||
an Integrator/AP or Integrator/PP2 platform, or if you have a
|
||||
- Cirrus Logic EP93xx CPU, say Y or M here.
|
||||
+ Cirrus Logic EP93xx CPU or an Infineon ADM5120 SOC, say Y or M here.
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
+config SERIAL_AMBA_PL010_NUMPORTS
|
||||
+ int "Maximum number of AMBA PL010 serial ports"
|
||||
+ depends on SERIAL_AMBA_PL010
|
||||
+ default "8"
|
||||
+ ---help---
|
||||
+ Set this to the number of serial ports you want the AMBA PL010 driver
|
||||
+ to support.
|
||||
+
|
||||
+config SERIAL_AMBA_PL010_PORTNAME
|
||||
+ string "Name of the AMBA PL010 serial ports"
|
||||
+ depends on SERIAL_AMBA_PL010
|
||||
+ default "ttyAM"
|
||||
+ ---help---
|
||||
+ ::: To be written :::
|
||||
+
|
||||
config SERIAL_AMBA_PL010_CONSOLE
|
||||
bool "Support for console on AMBA serial port"
|
||||
depends on SERIAL_AMBA_PL010=y
|
||||
@ -0,0 +1,13 @@
|
||||
--- a/drivers/amba/bus.c
|
||||
+++ b/drivers/amba/bus.c
|
||||
@@ -20,6 +20,10 @@
|
||||
#include <asm/irq.h>
|
||||
#include <asm/sizes.h>
|
||||
|
||||
+#ifndef NO_IRQ
|
||||
+#define NO_IRQ (-1)
|
||||
+#endif
|
||||
+
|
||||
#define to_amba_driver(d) container_of(d, struct amba_driver, drv)
|
||||
|
||||
static const struct amba_id *
|
||||
Loading…
Reference in New Issue