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ar71xx: add support for ar7241 and ar7242

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SVN-Revision: 20494
v19.07.3_mercusys_ac12_duma
Felix Fietkau 14 years ago
parent 4e10c56551
commit aa3ff31b95
9 changed files with 73 additions and 12 deletions
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6
target/linux/ar71xx/files/arch/mips/ar71xx/ar71xx.c
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@ -50,6 +50,8 @@ void ar71xx_device_stop(u32 mask)
break;
case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242:
mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
local_irq_save(flags);
t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
@ -90,6 +92,8 @@ void ar71xx_device_start(u32 mask)
break;
case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242:
mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
local_irq_save(flags);
t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
@ -128,6 +132,8 @@ int ar71xx_device_stopped(u32 mask)
break;
case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242:
local_irq_save(flags);
t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
local_irq_restore(flags);

16
target/linux/ar71xx/files/arch/mips/ar71xx/dev-usb.c
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@ -128,10 +128,16 @@ static void __init ar7240_usb_setup(void)
/* WAR for HW bug. Here it adjusts the duration between two SOFS */
ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x3);
ar71xx_ohci_device.resource = ar7240_ohci_resources;
ar71xx_ohci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources);
platform_device_register(&ar71xx_ohci_device);
if (ar71xx_soc == AR71XX_SOC_AR7241 || ar71xx_soc == AR71XX_SOC_AR7242) {
ar71xx_ehci_data.is_ar91xx = 1;
ar71xx_ehci_device.resource = ar7240_ohci_resources;
ar71xx_ehci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources);
platform_device_register(&ar71xx_ehci_device);
} else {
ar71xx_ohci_device.resource = ar7240_ohci_resources;
ar71xx_ohci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources);
platform_device_register(&ar71xx_ohci_device);
}
}
static void __init ar91xx_usb_setup(void)
@ -153,6 +159,8 @@ void __init ar71xx_add_device_usb(void)
{
switch (ar71xx_soc) {
case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242:
ar7240_usb_setup();
break;

13
target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
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@ -84,8 +84,15 @@ struct platform_device ar71xx_mdio_device = {
void __init ar71xx_add_device_mdio(u32 phy_mask)
{
if (ar71xx_soc == AR71XX_SOC_AR7240)
switch (ar71xx_soc) {
case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242:
ar71xx_mdio_data.is_ar7240 = 1;
break;
default:
break;
}
ar71xx_mdio_data.phy_mask = phy_mask;
@ -333,6 +340,8 @@ static void __init ar71xx_init_eth_pll_data(unsigned int id)
break;
case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242:
pll_10 = AR724X_PLL_VAL_10;
pll_100 = AR724X_PLL_VAL_100;
pll_1000 = AR724X_PLL_VAL_1000;
@ -428,6 +437,8 @@ void __init ar71xx_add_device_eth(unsigned int id)
break;
case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242:
pdata->ddr_flush = id ? ar724x_ddr_flush_ge1
: ar724x_ddr_flush_ge0;
pdata->set_pll = id ? ar724x_set_pll_ge1

2
target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c
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@ -162,6 +162,8 @@ void __init ar71xx_gpio_init(void)
break;
case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242:
ar71xx_gpio_chip.ngpio = AR724X_GPIO_COUNT;
break;

10
target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
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@ -209,10 +209,16 @@ static void __init ar71xx_misc_irq_init(void)
__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE);
__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS);
if (ar71xx_soc == AR71XX_SOC_AR7240)
switch (ar71xx_soc) {
case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242:
ar71xx_misc_irq_chip.ack = ar724x_misc_irq_ack;
else
break;
default:
ar71xx_misc_irq_chip.mask_ack = ar71xx_misc_irq_mask;
break;
}
for (i = AR71XX_MISC_IRQ_BASE;
i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++) {

4
target/linux/ar71xx/files/arch/mips/ar71xx/pci.c
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@ -52,6 +52,8 @@ int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
break;
case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242:
ret = ar724x_pcibios_map_irq(dev, slot, pin);
break;
@ -75,6 +77,8 @@ int __init ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map)
break;
case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242:
ret = ar724x_pcibios_init();
break;

16
target/linux/ar71xx/files/arch/mips/ar71xx/setup.c
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@ -106,12 +106,24 @@ static void __init ar71xx_detect_sys_type(void)
}
break;
case REV_ID_MAJOR_AR724X:
case REV_ID_MAJOR_AR7240:
ar71xx_soc = AR71XX_SOC_AR7240;
chip = "7240";
rev = (id & AR724X_REV_ID_REVISION_MASK);
break;
case REV_ID_MAJOR_AR7241:
ar71xx_soc = AR71XX_SOC_AR7241;
chip = "7241";
rev = (id & AR724X_REV_ID_REVISION_MASK);
break;
case REV_ID_MAJOR_AR7242:
ar71xx_soc = AR71XX_SOC_AR7242;
chip = "7242";
rev = (id & AR724X_REV_ID_REVISION_MASK);
break;
case REV_ID_MAJOR_AR913X:
minor = id & AR91XX_REV_ID_MINOR_MASK;
rev = id >> AR91XX_REV_ID_REVISION_SHIFT;
@ -210,6 +222,8 @@ static void __init detect_sys_frequency(void)
break;
case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242:
ar724x_detect_sys_frequency();
break;

12
target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
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@ -112,6 +112,8 @@ enum ar71xx_soc_type {
AR71XX_SOC_AR7141,
AR71XX_SOC_AR7161,
AR71XX_SOC_AR7240,
AR71XX_SOC_AR7241,
AR71XX_SOC_AR7242,
AR71XX_SOC_AR9130,
AR71XX_SOC_AR9132
};
@ -429,10 +431,12 @@ void ar71xx_ddr_flush(u32 reg);
#define AR724X_RESET_PCIE_PHY BIT(7)
#define AR724X_RESET_PCIE BIT(6)
#define REV_ID_MAJOR_MASK 0xf0
#define REV_ID_MAJOR_AR71XX 0xa0
#define REV_ID_MAJOR_AR913X 0xb0
#define REV_ID_MAJOR_AR724X 0xc0
#define REV_ID_MAJOR_MASK 0xfff0
#define REV_ID_MAJOR_AR71XX 0x00a0
#define REV_ID_MAJOR_AR913X 0x00b0
#define REV_ID_MAJOR_AR7240 0x00c0
#define REV_ID_MAJOR_AR7241 0x0100
#define REV_ID_MAJOR_AR7242 0x1100
#define AR71XX_REV_ID_MINOR_MASK 0x3
#define AR71XX_REV_ID_MINOR_AR7130 0x0

6
target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c
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@ -248,6 +248,12 @@ static int __init ar724x_pci_setup(void)
return -ENODEV;
}
if (ar71xx_soc == AR71XX_SOC_AR7241 || ar71xx_soc == AR71XX_SOC_AR7242) {
t = __raw_readl(base + AR724X_PCI_REG_APP);
t |= BIT(16);
__raw_writel(t, base + AR724X_PCI_REG_APP);
}
return 0;
}

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