update madwifi to the madwifi-dfs branch - should fix a few ad-hoc mode issues, needs more testing
SVN-Revision: 9648v19.07.3_mercusys_ac12_duma
Felix Fietkau
17 years ago
parent
93df90ed3e
commit
9c7edf0ad0
@ -1,15 +0,0 @@
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Index: madwifi-ng-r2834-20071106/ath/if_ath.c
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===================================================================
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--- madwifi-ng-r2834-20071106.orig/ath/if_ath.c 2007-11-07 14:02:00.533401273 +0100
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+++ madwifi-ng-r2834-20071106/ath/if_ath.c 2007-11-07 14:02:00.957425434 +0100
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@@ -2122,7 +2122,10 @@
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ath_draintxq(sc);
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if (!sc->sc_invalid) {
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ath_stoprecv(sc);
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+
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+ /* XXX: this helps to avoid crashes on ifconfig down/up
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ath_hal_phydisable(ah);
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+ */
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} else
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sc->sc_rxlink = NULL;
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ath_beacon_free(sc); /* XXX needed? */
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@ -1,197 +0,0 @@
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Index: madwifi-ng-r2834-20071106/ath/if_ath.c
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===================================================================
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--- madwifi-ng-r2834-20071106.orig/ath/if_ath.c 2007-11-07 14:02:01.785472625 +0100
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+++ madwifi-ng-r2834-20071106/ath/if_ath.c 2007-11-07 14:02:02.637521177 +0100
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@@ -4559,16 +4559,31 @@
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struct ieee80211com *ic = &sc->sc_ic;
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struct ath_hal *ah = sc->sc_ah;
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struct ieee80211_node *ni;
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- u_int32_t nexttbtt, intval;
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+ u_int32_t nexttbtt = 0;
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+ u_int32_t intval;
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+ u_int64_t tsf, hw_tsf;
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+ u_int32_t tsftu, hw_tsftu;
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+ int should_reset_tsf = 0;
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if (vap == NULL)
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vap = TAILQ_FIRST(&ic->ic_vaps); /* XXX */
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ni = vap->iv_bss;
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- /* extract tstamp from last beacon and convert to TU */
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- nexttbtt = TSF_TO_TU(LE_READ_4(ni->ni_tstamp.data + 4),
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- LE_READ_4(ni->ni_tstamp.data));
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+ hw_tsf = ath_hal_gettsf64(ah);
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+ tsf = le64_to_cpu(ni->ni_tstamp.tsf);
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+ hw_tsftu = hw_tsf >> 10;
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+ tsftu = tsf >> 10;
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+
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+ /* we should reset hw TSF only once, so we increment
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+ ni_tstamp.tsf to avoid resetting the hw TSF multiple
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+ times */
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+
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+ if (tsf == 0) {
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+ should_reset_tsf = 1;
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+ ni->ni_tstamp.tsf = cpu_to_le64(1);
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+ }
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+
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/* XXX conditionalize multi-bss support? */
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if (ic->ic_opmode == IEEE80211_M_HOSTAP) {
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/*
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@@ -4582,20 +4597,61 @@
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if (sc->sc_stagbeacons)
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intval /= ATH_BCBUF; /* for staggered beacons */
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if ((sc->sc_nostabeacons) &&
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- (vap->iv_opmode == IEEE80211_M_HOSTAP))
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- nexttbtt = 0;
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+ (vap->iv_opmode == IEEE80211_M_HOSTAP))
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+ should_reset_tsf = 1;
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} else
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intval = ni->ni_intval & HAL_BEACON_PERIOD;
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- if (nexttbtt == 0) /* e.g. for ap mode */
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+
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+#define FUDGE 2
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+ sc->sc_syncbeacon = 0;
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+ if (should_reset_tsf) {
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+
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+ /* We just created the interface and TSF will be reset to
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+ zero, so next beacon will be sent at the next intval
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+ time */
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+
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nexttbtt = intval;
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- else if (intval) /* NB: can be 0 for monitor mode */
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- nexttbtt = roundup(nexttbtt, intval);
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- DPRINTF(sc, ATH_DEBUG_BEACON, "%s: nexttbtt %u intval %u (%u)\n",
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- __func__, nexttbtt, intval, ni->ni_intval);
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+ } else if (intval) { /* NB: can be 0 for monitor mode */
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+ if (tsf == 1) {
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+
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+ /* We do not receive any beacons or probe response. Since
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+ a beacon should be sent every 'intval' ms, we compute
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+ the next beacon timestamp using the hardware TSF. We
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+ ensure that it is at least FUDGE ms ahead of the
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+ current TSF. Otherwise, we use the next beacon
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+ timestamp again */
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+
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+ nexttbtt = roundup(hw_tsftu +1, intval);
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+ while (nexttbtt <= hw_tsftu + FUDGE) {
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+ nexttbtt += intval;
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+ }
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+ } else {
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+ if (tsf > hw_tsf) {
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+
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+ /* We do receive a beacon from someone else in the past,
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+ but the hw TSF has not been updated (otherwise we
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+ would have tsf >= hw_tsf). Since we cannot use the
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+ hardware TSF, we will do nothing and wait for the
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+ next beacon. In order to do so, we set sc->syncbeacon
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+ again */
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+
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+ sc->sc_syncbeacon = 1;
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+ goto ath_beacon_config_debug;
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+ } else {
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+ /* We do receive a beacon in the past, normal case. We
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+ make sure that the timestamp is at least FUDGE ms
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+ ahead of the hardware TSF */
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+
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+ nexttbtt = tsftu + intval;
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+ while (nexttbtt <= hw_tsftu + FUDGE) {
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+ nexttbtt += intval;
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+ }
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+ }
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+ }
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+ }
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+
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if (ic->ic_opmode == IEEE80211_M_STA && !(sc->sc_nostabeacons)) {
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HAL_BEACON_STATE bs;
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- u_int64_t tsf;
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- u_int32_t tsftu;
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int dtimperiod, dtimcount;
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int cfpperiod, cfpcount;
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@@ -4611,13 +4667,13 @@
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dtimcount = 0; /* XXX? */
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cfpperiod = 1; /* NB: no PCF support yet */
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cfpcount = 0;
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-#define FUDGE 2
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/*
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* Pull nexttbtt forward to reflect the current
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* TSF and calculate dtim+cfp state for the result.
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*/
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- tsf = ath_hal_gettsf64(ah);
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- tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
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+ nexttbtt = tsftu;
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+ if (nexttbtt == 0) /* e.g. for ap mode */
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+ nexttbtt = intval;
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do {
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nexttbtt += intval;
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if (--dtimcount < 0) {
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@@ -4625,7 +4681,7 @@
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if (--cfpcount < 0)
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cfpcount = cfpperiod - 1;
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}
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- } while (nexttbtt < tsftu);
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+ } while (nexttbtt < hw_tsftu + FUDGE);
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#undef FUDGE
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memset(&bs, 0, sizeof(bs));
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bs.bs_intval = intval;
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@@ -4677,7 +4733,7 @@
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DPRINTF(sc, ATH_DEBUG_BEACON,
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"%s: tsf %llu tsf:tu %u intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u cfp:period %u maxdur %u next %u timoffset %u\n",
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__func__,
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- (unsigned long long) tsf, tsftu,
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+ (unsigned long long) hw_tsf, hw_tsftu,
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bs.bs_intval,
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bs.bs_nexttbtt,
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bs.bs_dtimperiod,
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@@ -4699,7 +4755,7 @@
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ath_hal_intrset(ah, sc->sc_imask);
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} else {
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ath_hal_intrset(ah, 0);
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- if (nexttbtt == intval)
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+ if (should_reset_tsf)
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intval |= HAL_BEACON_RESET_TSF;
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if (ic->ic_opmode == IEEE80211_M_IBSS) {
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/*
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@@ -4736,8 +4792,40 @@
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if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_hasveol)
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ath_beacon_start_adhoc(sc, vap);
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}
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- sc->sc_syncbeacon = 0;
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#undef TSF_TO_TU
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+
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+ ath_beacon_config_debug:
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+
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+ /* we print all debug messages here, in order to preserve the
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+ time critical aspect of this function */
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+
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+ DPRINTF(sc, ATH_DEBUG_BEACON,
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+ "%s: ni=%p tsf=%llu hw_tsf=%llu tsftu=%u hw_tsftu=%u\n",
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+ __func__, ni, tsf, hw_tsf, tsftu, hw_tsftu);
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+
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+ if (should_reset_tsf) {
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+ /* we just created the interface */
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+ DPRINTF(sc, ATH_DEBUG_BEACON, "%s: first beacon\n",__func__);
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+ } else {
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+ if (tsf == 1) {
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+ /* we do not receive any beacons or probe response */
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+ DPRINTF(sc, ATH_DEBUG_BEACON,
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+ "%s: no beacon received...\n",__func__);
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+ } else {
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+ if (tsf > hw_tsf) {
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+ /* we do receive a beacon and the hw TSF has not been updated */
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+ DPRINTF(sc, ATH_DEBUG_BEACON,
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+ "%s: beacon received, but TSF is incorrect\n",__func__);
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+ } else {
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+ /* we do receive a beacon in the past, normal case */
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+ DPRINTF(sc, ATH_DEBUG_BEACON,
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+ "%s: beacon received, TSF is correct\n",__func__);
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+ }
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+ }
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+ }
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+
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+ DPRINTF(sc, ATH_DEBUG_BEACON, "%s: nexttbtt=%u intval=%u\n",
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+ __func__,nexttbtt, intval & HAL_BEACON_PERIOD);
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}
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static int
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@ -1,258 +0,0 @@
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Index: madwifi-ng-r2978-20071127/ath/if_ath.c
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===================================================================
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--- madwifi-ng-r2978-20071127.orig/ath/if_ath.c 2007-11-27 21:18:24.910671912 +0100
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+++ madwifi-ng-r2978-20071127/ath/if_ath.c 2007-11-27 21:21:37.137626301 +0100
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@@ -515,7 +515,6 @@
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*/
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#define ATH_SET_VAP_BSSID_MASK(bssid_mask) \
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((bssid_mask)[0] &= ~(((ATH_BCBUF-1) << 2) | 0x02))
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-#define ATH_GET_VAP_ID(bssid) ((bssid)[0] >> 2)
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#define ATH_SET_VAP_BSSID(bssid, id) \
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do { \
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if (id) \
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@@ -1203,7 +1202,11 @@
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case IEEE80211_M_IBSS:
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if ((sc->sc_nvaps != 0) && (ic->ic_opmode == IEEE80211_M_STA))
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return NULL;
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- ic_opmode = opmode;
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+ else if (sc->sc_nvaps == 0)
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+ ic_opmode = opmode;
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+ else
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+ ic_opmode = IEEE80211_M_HOSTAP;
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+ sc->sc_nibssvaps++;
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break;
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case IEEE80211_M_AHDEMO:
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case IEEE80211_M_MONITOR:
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@@ -1233,7 +1236,7 @@
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return NULL;
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}
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- if (sc->sc_nvaps >= ATH_BCBUF) {
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+ if (sc->sc_nvaps + sc->sc_nibssvaps >= ATH_BCBUF) {
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printk(KERN_WARNING "too many virtual APs (already got %d)\n",
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sc->sc_nvaps);
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return NULL;
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@@ -1288,6 +1291,7 @@
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/* Use RadioTAP interface type for monitor mode. */
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dev->type = ARPHRD_IEEE80211_RADIOTAP;
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+ avp->av_bslot = -1;
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if ((flags & IEEE80211_CLONE_BSSID) && sc->sc_hasbmask) {
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struct ieee80211vap *v;
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unsigned int id_mask, id;
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@@ -1301,18 +1305,22 @@
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/* do a full search to mark all the allocated VAPs */
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id_mask = 0;
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- TAILQ_FOREACH(v, &ic->ic_vaps, iv_next)
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- id_mask |= (1 << ATH_GET_VAP_ID(v->iv_myaddr));
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+ TAILQ_FOREACH(v, &ic->ic_vaps, iv_next) {
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+ struct ath_vap *a = (struct ath_vap *) v->iv_dev->priv;
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+ if (a->av_bslot >= 0)
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+ id_mask |= (1 << a->av_bslot);
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+ }
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- for (id = 1; id < ATH_BCBUF; id++) {
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+ /* IBSS mode has local always set, so don't hand out beacon slot 0 to an IBSS vap */
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+ for (id = (opmode == IEEE80211_M_IBSS ? 1 : 0); id < ATH_BCBUF; id++) {
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/* get the first available slot */
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if ((id_mask & (1 << id)) == 0) {
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ATH_SET_VAP_BSSID(vap->iv_myaddr, id);
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+ avp->av_bslot = id;
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break;
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}
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}
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}
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- avp->av_bslot = -1;
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STAILQ_INIT(&avp->av_mcastq.axq_q);
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ATH_TXQ_LOCK_INIT(&avp->av_mcastq);
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if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_IBSS) {
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@@ -1322,33 +1330,14 @@
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*/
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avp->av_bcbuf = STAILQ_FIRST(&sc->sc_bbuf);
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STAILQ_REMOVE_HEAD(&sc->sc_bbuf, bf_list);
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- if (opmode == IEEE80211_M_HOSTAP || !sc->sc_hasveol) {
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+ if ((opmode == IEEE80211_M_IBSS) || (opmode == IEEE80211_M_HOSTAP) || !sc->sc_hasveol) {
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unsigned int slot;
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- /*
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- * Assign the VAP to a beacon xmit slot. As
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- * above, this cannot fail to find one.
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- */
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- avp->av_bslot = 0;
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- for (slot = 0; slot < ATH_BCBUF; slot++)
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- if (sc->sc_bslot[slot] == NULL) {
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- /*
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- * XXX hack, space out slots to better
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- * deal with misses
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- */
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- if (slot + 1 < ATH_BCBUF &&
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- sc->sc_bslot[slot+1] == NULL) {
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- avp->av_bslot = slot + 1;
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- break;
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- }
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- avp->av_bslot = slot;
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- /* NB: keep looking for a double slot */
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- }
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KASSERT(sc->sc_bslot[avp->av_bslot] == NULL,
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("beacon slot %u not empty?", avp->av_bslot));
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sc->sc_bslot[avp->av_bslot] = vap;
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sc->sc_nbcnvaps++;
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}
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- if ((opmode == IEEE80211_M_HOSTAP) && (sc->sc_hastsfadd)) {
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+ if ((sc->sc_opmode == IEEE80211_M_HOSTAP) && (sc->sc_hastsfadd)) {
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/*
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* Multiple VAPs are to transmit beacons and we
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* have h/w support for TSF adjusting; enable use
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@@ -1460,7 +1449,9 @@
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sc->sc_stagbeacons = 0;
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}
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- if (vap->iv_opmode == IEEE80211_M_STA) {
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+ if (vap->iv_opmode == IEEE80211_M_IBSS) {
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+ sc->sc_nibssvaps--;
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+ } else if (vap->iv_opmode == IEEE80211_M_STA) {
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sc->sc_nstavaps--;
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sc->sc_nostabeacons = 0;
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} else if (vap->iv_opmode == IEEE80211_M_MONITOR)
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@@ -3816,7 +3807,7 @@
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sc->sc_opmode == HAL_M_IBSS || /* NB: AHDEMO too */
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(sc->sc_nostabeacons) || sc->sc_scanning)
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rfilt |= HAL_RX_FILTER_BEACON;
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- if (sc->sc_nmonvaps > 0)
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+ if ((sc->sc_nmonvaps > 0) || ((sc->sc_nvaps > 0) && (sc->sc_nibssvaps > 0)))
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rfilt |= (HAL_RX_FILTER_CONTROL | HAL_RX_FILTER_BEACON |
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HAL_RX_FILTER_PROBEREQ | HAL_RX_FILTER_PROM);
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return rfilt;
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@@ -6284,12 +6275,20 @@
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type = ieee80211_input(ni, skb, rs->rs_rssi, bf->bf_tsf);
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ieee80211_unref_node(&ni);
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} else {
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+ const struct ieee80211_frame_min *wh = (const struct ieee80211_frame_min *) skb->data;
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/*
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* No key index or no entry, do a lookup and
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* add the node to the mapping table if possible.
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*/
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- ni = ieee80211_find_rxnode(ic,
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- (const struct ieee80211_frame_min *) skb->data);
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+ if (((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == IEEE80211_FC0_SUBTYPE_PROBE_REQ) &&
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+ (sc->sc_nibssvaps > 0))
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+ /* if this is a probe request, send it to all vaps
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+ * when looking up nodes, hostap will be preferred over ibss,
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+ * because ibss will catch all nodes */
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+ ni = NULL;
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+ else
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+ ni = ieee80211_find_rxnode(ic, (const struct ieee80211_frame_min *) skb->data);
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+
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if (ni != NULL) {
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struct ath_node *an = ATH_NODE(ni);
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ieee80211_keyix_t keyix;
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Index: madwifi-ng-r2978-20071127/ath/if_athvar.h
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===================================================================
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--- madwifi-ng-r2978-20071127.orig/ath/if_athvar.h 2007-11-27 21:18:08.257722921 +0100
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+++ madwifi-ng-r2978-20071127/ath/if_athvar.h 2007-11-27 21:18:30.026963473 +0100
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@@ -209,7 +209,7 @@
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#define ATH_RXBUF 40 /* number of RX buffers */
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#define ATH_TXBUF 200 /* number of TX buffers */
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-#define ATH_BCBUF 4 /* number of beacon buffers */
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+#define ATH_BCBUF 8 /* number of beacon buffers */
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/* free buffer threshold to restart net dev */
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#define ATH_TXBUF_FREE_THRESHOLD (ATH_TXBUF / 20)
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@@ -667,6 +667,7 @@
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u_int16_t sc_nvaps; /* # of active virtual APs */
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u_int8_t sc_nstavaps; /* # of active station VAPs */
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u_int8_t sc_nmonvaps; /* # of monitor VAPs */
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+ u_int8_t sc_nibssvaps; /* # of active ibss vaps */
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u_int8_t sc_nbcnvaps; /* # of vaps sending beacons */
|
||||
u_int sc_fftxqmin; /* aggregation threshold */
|
||||
HAL_INT sc_imask; /* interrupt mask copy */
|
||||
Index: madwifi-ng-r2978-20071127/net80211/ieee80211_beacon.c
|
||||
===================================================================
|
||||
--- madwifi-ng-r2978-20071127.orig/net80211/ieee80211_beacon.c 2007-11-27 21:18:08.265723374 +0100
|
||||
+++ madwifi-ng-r2978-20071127/net80211/ieee80211_beacon.c 2007-11-27 21:18:30.034963929 +0100
|
||||
@@ -111,7 +111,7 @@
|
||||
bo->bo_tim = frm;
|
||||
|
||||
/* IBSS/TIM */
|
||||
- if (vap->iv_opmode == IEEE80211_M_IBSS) {
|
||||
+ if (ic->ic_opmode == IEEE80211_M_IBSS) {
|
||||
*frm++ = IEEE80211_ELEMID_IBSSPARMS;
|
||||
*frm++ = 2;
|
||||
*frm++ = 0; *frm++ = 0; /* TODO: ATIM window */
|
||||
Index: madwifi-ng-r2978-20071127/net80211/ieee80211_input.c
|
||||
===================================================================
|
||||
--- madwifi-ng-r2978-20071127.orig/net80211/ieee80211_input.c 2007-11-27 21:18:08.269723596 +0100
|
||||
+++ madwifi-ng-r2978-20071127/net80211/ieee80211_input.c 2007-11-27 21:18:30.038964155 +0100
|
||||
@@ -3069,7 +3069,13 @@
|
||||
return;
|
||||
}
|
||||
if (ni == vap->iv_bss) {
|
||||
- if (vap->iv_opmode == IEEE80211_M_IBSS) {
|
||||
+ /* this probe request may have been sent to all vaps
|
||||
+ * to give each a chance of creating a node for this.
|
||||
+ * important for hostap+ibss mode */
|
||||
+ ni = ieee80211_find_rxnode(ic, (const struct ieee80211_frame_min *) skb->data);
|
||||
+ if (ni) {
|
||||
+ allocbs = 0;
|
||||
+ } else if (vap->iv_opmode == IEEE80211_M_IBSS) {
|
||||
/*
|
||||
* XXX Cannot tell if the sender is operating
|
||||
* in ibss mode. But we need a new node to
|
||||
@@ -3078,12 +3084,13 @@
|
||||
*/
|
||||
ni = ieee80211_fakeup_adhoc_node(vap,
|
||||
wh->i_addr2);
|
||||
+ allocbs = 1;
|
||||
} else {
|
||||
ni = ieee80211_dup_bss(vap, wh->i_addr2, 1);
|
||||
+ allocbs = 1;
|
||||
}
|
||||
if (ni == NULL)
|
||||
return;
|
||||
- allocbs = 1;
|
||||
}
|
||||
|
||||
IEEE80211_NOTE_MAC(vap, IEEE80211_MSG_INPUT, wh->i_addr2,
|
||||
Index: madwifi-ng-r2978-20071127/net80211/ieee80211_node.c
|
||||
===================================================================
|
||||
--- madwifi-ng-r2978-20071127.orig/net80211/ieee80211_node.c 2007-11-27 21:18:08.281724279 +0100
|
||||
+++ madwifi-ng-r2978-20071127/net80211/ieee80211_node.c 2007-11-27 21:24:30.083481925 +0100
|
||||
@@ -1326,13 +1326,26 @@
|
||||
IEEE80211_NODE_TABLE_LOCK_ASSERT(nt);
|
||||
|
||||
hash = IEEE80211_NODE_HASH(macaddr);
|
||||
+
|
||||
+ /* look for non-ibss nodes first */
|
||||
LIST_FOREACH(ni, &nt->nt_hash[hash], ni_hash) {
|
||||
- if (IEEE80211_ADDR_EQ(ni->ni_macaddr, macaddr)) {
|
||||
+ if (IEEE80211_ADDR_EQ(ni->ni_macaddr, macaddr) && ni->ni_vap->iv_opmode != IEEE80211_M_IBSS) {
|
||||
#ifdef IEEE80211_DEBUG_REFCNT
|
||||
ieee80211_ref_node_debug(ni, func, line);
|
||||
#else
|
||||
ieee80211_ref_node(ni);
|
||||
-#endif
|
||||
+#endif
|
||||
+ return ni;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ LIST_FOREACH(ni, &nt->nt_hash[hash], ni_hash) {
|
||||
+ if (IEEE80211_ADDR_EQ(ni->ni_macaddr, macaddr) && ni->ni_vap->iv_opmode == IEEE80211_M_IBSS) {
|
||||
+#ifdef IEEE80211_DEBUG_REFCNT
|
||||
+ ieee80211_ref_node_debug(ni, func, line);
|
||||
+#else
|
||||
+ ieee80211_ref_node(ni);
|
||||
+#endif
|
||||
return ni;
|
||||
}
|
||||
}
|
||||
@@ -1345,7 +1358,7 @@
|
||||
return ieee80211_ref_node_debug(wds->wds_ni, func, line);
|
||||
#else
|
||||
return ieee80211_ref_node(wds->wds_ni);
|
||||
-#endif
|
||||
+#endif
|
||||
}
|
||||
}
|
||||
return NULL;
|
||||
@ -0,0 +1,312 @@
|
||||
Index: madwifi-dfs-r2996/ath_hal/ah_os.h
|
||||
===================================================================
|
||||
--- madwifi-dfs-r2996.orig/ath_hal/ah_os.h 2007-12-01 19:36:04.943396719 +0100
|
||||
+++ madwifi-dfs-r2996/ath_hal/ah_os.h 2007-12-01 19:37:06.182886560 +0100
|
||||
@@ -33,7 +33,7 @@
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
|
||||
* THE POSSIBILITY OF SUCH DAMAGES.
|
||||
*
|
||||
- * $Id: ah_os.h 2727 2007-10-05 17:42:53Z mtaylor $
|
||||
+ * $Id: ah_os.h 2933 2007-11-23 09:38:18Z proski $
|
||||
*/
|
||||
#ifndef _ATH_AH_OS_H_
|
||||
#define _ATH_AH_OS_H_
|
||||
@@ -42,16 +42,16 @@
|
||||
* Atheros Hardware Access Layer (HAL) OS Dependent Definitions.
|
||||
*/
|
||||
|
||||
-/*
|
||||
-MadWifi safe register operations:
|
||||
+/*
|
||||
+ MadWifi safe register operations:
|
||||
|
||||
- When hacking on registers directly we need to use the macros
|
||||
- below, to avoid concurrent PCI access and abort mode errors.
|
||||
+ When hacking on registers directly, we need to use the macros below to
|
||||
+ avoid concurrent PCI access and abort mode errors.
|
||||
|
||||
* ath_reg_read
|
||||
* ATH_REG_WRITE
|
||||
|
||||
-HAL-ONLY register operations:
|
||||
+ HAL-ONLY register operations:
|
||||
|
||||
* _OS_REG_READ
|
||||
* _OS_REG_WRITE
|
||||
@@ -60,26 +60,27 @@
|
||||
* ath_hal_reg_read.
|
||||
* ath_hal_reg_write
|
||||
|
||||
- When compiled in HAL:
|
||||
- * We do not require locking overhead and function call unless user is debugging.
|
||||
- * All HAL operations are executed in the context of a MadWifi wrapper call which holds
|
||||
- the HAL lock.
|
||||
- * Normally HAL is build with the non-modified version of this file so it doesnt have our
|
||||
- funny macros anyway.
|
||||
-
|
||||
- When compiled in MadWifi:
|
||||
- * The HAL wrapper API takes the HAL lock before invoking the HAL.
|
||||
- * HAL access is already protected, and MadWifi must NOT access the functions listed above.
|
||||
-
|
||||
+ When compiled in HAL:
|
||||
+ * We don't require locking overhead and function call except for
|
||||
+ debugging.
|
||||
+ * All HAL operations are executed in the context of a MadWifi wrapper
|
||||
+ call that holds the HAL lock.
|
||||
+ * Normally HAL is built with the non-modified version of this file, so
|
||||
+ it doesn't have our funny macros anyway.
|
||||
+
|
||||
+ When compiled in MadWifi:
|
||||
+ * The HAL wrapper API takes the HAL lock before invoking the HAL.
|
||||
+ * HAL access is already protected, and MadWifi must NOT access the
|
||||
+ functions listed above.
|
||||
*/
|
||||
|
||||
/*
|
||||
- * When building the HAL proper we use no GPL-contaminated include
|
||||
- * files and must define these types ourself. Beware of these being
|
||||
- * mismatched against the contents of <linux/types.h>
|
||||
+ * When building the HAL proper, we use no GPL-licensed include files and must
|
||||
+ * define Linux types ourselves. Please note that the definitions below don't
|
||||
+ * exactly match those in <linux/types.h>
|
||||
*/
|
||||
#ifndef _LINUX_TYPES_H
|
||||
-/* NB: arm defaults to unsigned so be explicit */
|
||||
+/* NB: ARM defaults to unsigned, so be explicit */
|
||||
typedef signed char int8_t;
|
||||
typedef short int16_t;
|
||||
typedef int int32_t;
|
||||
@@ -93,36 +94,33 @@
|
||||
typedef unsigned int size_t;
|
||||
typedef unsigned int u_int;
|
||||
typedef void* va_list;
|
||||
-#endif
|
||||
+#endif /* !_LINUX_TYPES_H */
|
||||
|
||||
/*
|
||||
* Linux/BSD gcc compatibility shims.
|
||||
*/
|
||||
-#define __printflike(_a,_b) \
|
||||
- __attribute__ ((__format__ (__printf__, _a, _b)))
|
||||
-#define __va_list va_list
|
||||
+#define __va_list va_list
|
||||
#define OS_INLINE __inline
|
||||
|
||||
extern int ath_hal_dma_beacon_response_time;
|
||||
extern int ath_hal_sw_beacon_response_time;
|
||||
extern int ath_hal_additional_swba_backoff;
|
||||
|
||||
-void __ahdecl ath_hal_vprintf(struct ath_hal *ah, const char* fmt,
|
||||
- va_list ap);
|
||||
-void __ahdecl ath_hal_printf(struct ath_hal *ah, const char* fmt, ...);
|
||||
-const char* __ahdecl ath_hal_ether_sprintf(const u_int8_t *mac);
|
||||
+void __ahdecl ath_hal_vprintf(struct ath_hal *ah, const char *fmt, va_list ap);
|
||||
+void __ahdecl ath_hal_printf(struct ath_hal *ah, const char *fmt, ...);
|
||||
+const char *__ahdecl ath_hal_ether_sprintf(const u_int8_t *mac);
|
||||
int __ahdecl ath_hal_memcmp(const void *a, const void *b, size_t n);
|
||||
-void * __ahdecl ath_hal_malloc(size_t size);
|
||||
-void __ahdecl ath_hal_free(void* p);
|
||||
+void *__ahdecl ath_hal_malloc(size_t size);
|
||||
+void __ahdecl ath_hal_free(void *p);
|
||||
|
||||
/* Delay n microseconds. */
|
||||
-extern void __ahdecl ath_hal_delay(int);
|
||||
+extern void __ahdecl ath_hal_delay(int);
|
||||
#define OS_DELAY(_n) ath_hal_delay(_n)
|
||||
|
||||
#define OS_MEMZERO(_a, _n) ath_hal_memzero((_a), (_n))
|
||||
extern void __ahdecl ath_hal_memzero(void *, size_t);
|
||||
#define OS_MEMCPY(_d, _s, _n) ath_hal_memcpy(_d,_s,_n)
|
||||
-extern void * __ahdecl ath_hal_memcpy(void *, const void *, size_t);
|
||||
+extern void *__ahdecl ath_hal_memcpy(void *, const void *, size_t);
|
||||
|
||||
#ifndef abs
|
||||
#define abs(_a) __builtin_abs(_a)
|
||||
@@ -133,7 +131,7 @@
|
||||
#endif
|
||||
|
||||
struct ath_hal;
|
||||
-extern u_int32_t __ahdecl ath_hal_getuptime(struct ath_hal *);
|
||||
+extern u_int32_t __ahdecl ath_hal_getuptime(struct ath_hal *);
|
||||
#define OS_GETUPTIME(_ah) ath_hal_getuptime(_ah)
|
||||
|
||||
/* Byte order/swapping support. */
|
||||
@@ -142,9 +140,8 @@
|
||||
|
||||
#ifndef AH_BYTE_ORDER
|
||||
/*
|
||||
- * When the .inc file is not available (e.g. when building
|
||||
- * in a kernel source tree); look for some other way to
|
||||
- * setup the host byte order.
|
||||
+ * When the .inc file is not available (e.g. when building in the kernel source
|
||||
+ * tree), look for some other way to determine the host byte order.
|
||||
*/
|
||||
#ifdef __LITTLE_ENDIAN
|
||||
#define AH_BYTE_ORDER AH_LITTLE_ENDIAN
|
||||
@@ -155,93 +152,98 @@
|
||||
#ifndef AH_BYTE_ORDER
|
||||
#error "Do not know host byte order"
|
||||
#endif
|
||||
-#endif /* AH_BYTE_ORDER */
|
||||
+#endif /* AH_BYTE_ORDER */
|
||||
|
||||
/*
|
||||
- * Note that register accesses are done using target-specific
|
||||
- * functions when debugging is enabled (AH_DEBUG) or we are
|
||||
- * explicitly configured this way.
|
||||
- *
|
||||
- * The hardware registers are native little-endian byte order.
|
||||
- * Big-endian hosts are handled by enabling hardware byte-swap
|
||||
- * of register reads and writes at reset. But the PCI clock
|
||||
- * domain registers are not byte swapped! Thus, on big-endian
|
||||
- * platforms we have to byte-swap thoese registers specifically.
|
||||
- * Most of this code is collapsed at compile time because the
|
||||
- * register values are constants.
|
||||
- *
|
||||
- * Presumably when talking about hardware byte-swapping, the above
|
||||
- * text is referring to the Atheros chipset, as the registers
|
||||
- * referred to are in the PCI memory address space, and these are
|
||||
- * never byte-swapped by PCI chipsets or bridges, but always
|
||||
- * written directly (i.e. the format defined by the manufacturer).
|
||||
+ * Some big-endian architectures don't set CONFIG_GENERIC_IOMAP, but fail to
|
||||
+ * implement iowrite32be and ioread32be. Provide compatibility macros when
|
||||
+ * it's needed.
|
||||
+ *
|
||||
+ * As of Linux 2.6.24, only MIPS, PARISC and PowerPC implement iowrite32be and
|
||||
+ * ioread32be as functions.
|
||||
+ *
|
||||
+ * The downside or the replacement macros it that we may be byte-swapping data
|
||||
+ * for the second time, so the native implementations should be preferred.
|
||||
*/
|
||||
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)) && \
|
||||
+ !defined(CONFIG_GENERIC_IOMAP) && (AH_BYTE_ORDER == AH_BIG_ENDIAN) && \
|
||||
+ !defined(__mips__) && !defined(__hppa__) && !defined(__powerpc__)
|
||||
+# ifndef iowrite32be
|
||||
+# define iowrite32be(_val, _addr) iowrite32(swab32((_val)), (_addr))
|
||||
+# endif
|
||||
+# ifndef ioread32be
|
||||
+# define ioread32be(_addr) swab32(ioread32((_addr)))
|
||||
+# endif
|
||||
+#endif
|
||||
+
|
||||
+/*
|
||||
+ * The register accesses are done using target-specific functions when
|
||||
+ * debugging is enabled (AH_DEBUG) or it's explicitly requested for the target.
|
||||
+ *
|
||||
+ * The hardware registers use little-endian byte order natively. Big-endian
|
||||
+ * systems are configured by HAL to enable hardware byte-swap of register reads
|
||||
+ * and writes at reset. This avoid the need to byte-swap the data in software.
|
||||
+ * However, the registers in a certain area from 0x4000 to 0x4fff (PCI clock
|
||||
+ * domain registers) are not byte swapped!
|
||||
+ *
|
||||
+ * Since Linux I/O primitives default to little-endian operations, we only
|
||||
+ * need to suppress byte-swapping on big-endian systems outside the area used
|
||||
+ * by the PCI clock domain registers.
|
||||
+ */
|
||||
+#if (AH_BYTE_ORDER == AH_BIG_ENDIAN)
|
||||
+#define is_reg_le(__reg) ((0x4000 <= (__reg) && (__reg) < 0x5000))
|
||||
+#else
|
||||
+#define is_reg_le(__reg) 1
|
||||
+#endif
|
||||
+
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)
|
||||
-# if (AH_BYTE_ORDER == AH_BIG_ENDIAN)
|
||||
#define _OS_REG_WRITE(_ah, _reg, _val) do { \
|
||||
- (0x4000 <= (_reg) && (_reg) < 0x5000) ? \
|
||||
+ is_reg_le(_reg) ? \
|
||||
iowrite32((_val), (_ah)->ah_sh + (_reg)) : \
|
||||
iowrite32be((_val), (_ah)->ah_sh + (_reg)); \
|
||||
} while (0)
|
||||
#define _OS_REG_READ(_ah, _reg) \
|
||||
- ((0x4000 <= (_reg) && (_reg) < 0x5000) ? \
|
||||
+ (is_reg_le(_reg) ? \
|
||||
ioread32((_ah)->ah_sh + (_reg)) : \
|
||||
- ioread32be((_ah)->ah_sh + (_reg)));
|
||||
-# else /* AH_LITTLE_ENDIAN */
|
||||
-#define _OS_REG_WRITE(_ah, _reg, _val) do { \
|
||||
- iowrite32(_val, (_ah)->ah_sh + (_reg)); \
|
||||
- } while (0)
|
||||
-#define _OS_REG_READ(_ah, _reg) \
|
||||
- ioread32((_ah)->ah_sh + (_reg))
|
||||
-
|
||||
-# endif /* AH_BYTE_ORDER */
|
||||
+ ioread32be((_ah)->ah_sh + (_reg)))
|
||||
#else
|
||||
-# if (AH_BYTE_ORDER == AH_BIG_ENDIAN)
|
||||
#define _OS_REG_WRITE(_ah, _reg, _val) do { \
|
||||
- writel((0x4000 <= (_reg) && (_reg) < 0x5000) ? \
|
||||
+ writel(is_reg_le(_reg) ? \
|
||||
(_val) : cpu_to_le32(_val), \
|
||||
(_ah)->ah_sh + (_reg)); \
|
||||
} while (0)
|
||||
#define _OS_REG_READ(_ah, _reg) \
|
||||
- ((0x4000 <= (_reg) && (_reg) < 0x5000) ? \
|
||||
+ (is_reg_le(_reg) ? \
|
||||
readl((_ah)->ah_sh + (_reg)) : \
|
||||
cpu_to_le32(readl((_ah)->ah_sh + (_reg))))
|
||||
-# else /* AH_LITTLE_ENDIAN */
|
||||
-#define _OS_REG_WRITE(_ah, _reg, _val) do { \
|
||||
- writel(_val, (_ah)->ah_sh + (_reg)); \
|
||||
- } while (0)
|
||||
-#define _OS_REG_READ(_ah, _reg) \
|
||||
- readl((_ah)->ah_sh + (_reg))
|
||||
-# endif /* AH_BYTE_ORDER */
|
||||
-#endif /* KERNEL_VERSON(2,6,12) */
|
||||
-
|
||||
-/*
|
||||
-The functions in this section are not intended to be invoked by MadWifi driver
|
||||
-code, but by the HAL. They are NOT safe for direct invocation when the
|
||||
-sc->sc_hal_lock is not held. Use ath_reg_read and ATH_REG_WRITE instead!
|
||||
+#endif /* KERNEL_VERSION(2,6,12) */
|
||||
+
|
||||
+/*
|
||||
+ * The functions in this section are not intended to be invoked by MadWifi
|
||||
+ * driver code, but by the HAL. They are NOT safe to call directly when the
|
||||
+ * sc->sc_hal_lock is not held. Use ath_reg_read and ATH_REG_WRITE instead!
|
||||
*/
|
||||
#if defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) || defined(AH_DEBUG_ALQ)
|
||||
#define OS_REG_WRITE(_ah, _reg, _val) ath_hal_reg_write(_ah, _reg, _val)
|
||||
#define OS_REG_READ(_ah, _reg) ath_hal_reg_read(_ah, _reg)
|
||||
-extern void __ahdecl ath_hal_reg_write(struct ath_hal *ah, u_int reg, u_int32_t val);
|
||||
-extern u_int32_t __ahdecl ath_hal_reg_read(struct ath_hal *ah, u_int reg);
|
||||
+extern void __ahdecl ath_hal_reg_write(struct ath_hal *ah, u_int reg,
|
||||
+ u_int32_t val);
|
||||
+extern u_int32_t __ahdecl ath_hal_reg_read(struct ath_hal *ah, u_int reg);
|
||||
#else
|
||||
#define OS_REG_WRITE(_ah, _reg, _val) _OS_REG_WRITE(_ah, _reg, _val)
|
||||
#define OS_REG_READ(_ah, _reg) _OS_REG_READ(_ah, _reg)
|
||||
-#endif /* AH_DEBUG || AH_REGFUNC || AH_DEBUG_ALQ */
|
||||
+#endif /* AH_DEBUG || AH_REGFUNC || AH_DEBUG_ALQ */
|
||||
|
||||
extern char *ath_hal_func;
|
||||
static inline void ath_hal_set_function(const char *name)
|
||||
-#if defined(AH_DEBUG)
|
||||
{
|
||||
+#ifdef AH_DEBUG
|
||||
ath_hal_func = (char *)name;
|
||||
-}
|
||||
-#else
|
||||
-{ }
|
||||
#endif
|
||||
+}
|
||||
|
||||
#ifdef AH_DEBUG_ALQ
|
||||
-extern void __ahdecl OS_MARK(struct ath_hal *, u_int id, u_int32_t value);
|
||||
+extern void __ahdecl OS_MARK(struct ath_hal *, u_int id, u_int32_t value);
|
||||
#else
|
||||
#define OS_MARK(_ah, _id, _v)
|
||||
#endif
|
||||
@@ -253,8 +255,9 @@
|
||||
* compiled with the default calling convention and are not called
|
||||
* from within the HAL.
|
||||
*/
|
||||
-extern struct ath_hal *_ath_hal_attach(u_int16_t devid, HAL_SOFTC,
|
||||
- HAL_BUS_TAG, HAL_BUS_HANDLE, HAL_STATUS*);
|
||||
-extern void _ath_hal_detach(struct ath_hal *);
|
||||
+extern struct ath_hal *_ath_hal_attach(u_int16_t devid, HAL_SOFTC,
|
||||
+ HAL_BUS_TAG, HAL_BUS_HANDLE,
|
||||
+ HAL_STATUS *);
|
||||
+extern void _ath_hal_detach(struct ath_hal *);
|
||||
|
||||
-#endif /* _ATH_AH_OSDEP_H_ */
|
||||
+#endif /* _ATH_AH_OSDEP_H_ */
|
||||
Loading…
Reference in New Issue