ipq806x: remove merged ipq4019 patch

The patch 0022-dts-ipq4019-support-ARMv7-PMU.patch
was merged into 4.8-rc1.

Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
[refresh patches]
Signed-off-by: Mathias Kresin <dev@kresin.me>
v19.07.3_mercusys_ac12_duma
Christian Lamparter 6 years ago committed by Mathias Kresin
parent 5988364cf3
commit 9c2ac19b03

@ -1,28 +0,0 @@
From 47f00399b195e0987c67006b329587bef0692bf4 Mon Sep 17 00:00:00 2001
From: Thomas Pedersen <twp@codeaurora.org>
Date: Wed, 4 May 2016 12:25:41 -0700
Subject: [PATCH 22/69] dts: ipq4019: support ARMv7 PMU
Add support for cortex-a7-pmu present on ipq4019 SoCs.
Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
Signed-off-by: Matthew McClintock <mmcclint@qca.qualcomm.com>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -108,6 +108,12 @@
IRQ_TYPE_LEVEL_HIGH)>;
};
+ pmu {
+ compatible = "arm,cortex-a7-pmu";
+ interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
clocks {
sleep_clk: sleep_clk {
compatible = "fixed-clock";

@ -67,7 +67,7 @@ Changes:
qcom,acc = <&acc3>;
qcom,saw = <&saw3>;
reg = <0x3>;
@@ -218,22 +228,22 @@
@@ -212,22 +222,22 @@
};
acc0: clock-controller@b088000 {
@ -94,7 +94,7 @@ Changes:
reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>;
};
@@ -261,6 +271,12 @@
@@ -255,6 +265,12 @@
regulator;
};

@ -51,7 +51,7 @@ Changes:
};
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -313,5 +313,76 @@
@@ -307,5 +307,76 @@
compatible = "qcom,pshold";
reg = <0x4ab000 0x4>;
};

@ -13,7 +13,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -384,5 +384,89 @@
@@ -378,5 +378,89 @@
dr_mode = "host";
};
};

@ -13,7 +13,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -277,6 +277,13 @@
@@ -271,6 +271,13 @@
regulator;
};

@ -15,7 +15,7 @@ so the info might change.
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -321,6 +321,34 @@
@@ -315,6 +315,34 @@
reg = <0x4ab000 0x4>;
};

@ -14,7 +14,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -349,6 +349,29 @@
@@ -343,6 +343,29 @@
};
};

@ -25,7 +25,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
};
cpus {
@@ -372,6 +374,64 @@
@@ -366,6 +368,64 @@
status = "disabled";
};

@ -120,7 +120,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
};
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -586,5 +586,43 @@
@@ -580,5 +580,43 @@
"legacy";
status = "disabled";
};

@ -33,7 +33,7 @@ Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
pins = "gpio60", "gpio61";
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -155,7 +155,7 @@
@@ -149,7 +149,7 @@
reg = <0x1800000 0x60000>;
};

@ -54,7 +54,7 @@ Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
mux {
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -132,6 +132,21 @@
@@ -126,6 +126,21 @@
clock-frequency = <32768>;
#clock-cells = <0>;
};

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