Imre Kaloz
12 years ago
parent
44631ef595
commit
9a91dc9f71
@ -1,194 +0,0 @@
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Sat, 17 Dec 2011 00:09:11 +0000 (-0800)
|
||||
Subject: ARM: OMAP4: hwmod: Don't wait for the idle status if modulemode is not supported
|
||||
X-Git-Url: http://git.kernel.org/?p=linux%2Fkernel%2Fgit%2Ftorvalds%2Flinux.git;a=commitdiff_plain;h=bfc141e3a515008d85e57af39c9faa4d2bbc65e0;hp=ddf536d0d7e1f0b63a681c970888730a4437414d
|
||||
|
||||
ARM: OMAP4: hwmod: Don't wait for the idle status if modulemode is not supported
|
||||
|
||||
If the module does not have any modulemode, the _disable_module function
|
||||
will do nothing. There is then no point waiting for a idle status change.
|
||||
|
||||
It will remove the following warnings.
|
||||
|
||||
[ 0.331848] omap_hwmod: dmm: _wait_target_disable failed
|
||||
[ 0.339935] omap_hwmod: emif_fw: _wait_target_disable failed
|
||||
[ 0.348358] omap_hwmod: l3_main_1: _wait_target_disable failed
|
||||
[ 0.356964] omap_hwmod: l3_main_2: _wait_target_disable failed
|
||||
[ 0.365600] omap_hwmod: l4_abe: _wait_target_disable failed
|
||||
[ 0.373931] omap_hwmod: l4_cfg: _wait_target_disable failed
|
||||
[ 0.382263] omap_hwmod: l4_per: _wait_target_disable failed
|
||||
[ 0.391113] omap_hwmod: l4_wkup: _wait_target_disable failed
|
||||
[ 0.399536] omap_hwmod: dma_system: _wait_target_disable failed
|
||||
[ 0.408325] omap_hwmod: dss_core: _wait_target_disable failed
|
||||
[ 0.416839] omap_hwmod: dss_dispc: _wait_target_disable failed
|
||||
[ 0.425445] omap_hwmod: dss_dsi1: _wait_target_disable failed
|
||||
[ 0.433990] omap_hwmod: dss_dsi2: _wait_target_disable failed
|
||||
[ 0.442504] omap_hwmod: dss_hdmi: _wait_target_disable failed
|
||||
[ 0.451019] omap_hwmod: dss_rfbi: _wait_target_disable failed
|
||||
[ 0.459564] omap_hwmod: dss_venc: _wait_target_disable failed
|
||||
[ 0.489471] omap_hwmod: mailbox: _wait_target_disable failed
|
||||
[ 0.505920] omap_hwmod: spinlock: _wait_target_disable failed
|
||||
|
||||
Note: For such module, the state is managed automatically by HW according
|
||||
to clock domain transition. It is then not possible to wait for idle even
|
||||
later in the _idle function since the status will change at clock domain
|
||||
boundary.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Paul Walmsley <paul@pwsan.com>
|
||||
Cc: Rajendra Nayak <rnayak@ti.com>
|
||||
[paul@pwsan.com: renamed fns to indicate that they are OMAP4-only; moved
|
||||
_wait_target_disable() into _disable_module(), removing duplicate code]
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
---
|
||||
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod.c
|
||||
@@ -706,27 +706,65 @@ static void _enable_module(struct omap_h
|
||||
}
|
||||
|
||||
/**
|
||||
- * _disable_module - enable CLKCTRL modulemode on OMAP4
|
||||
+ * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
|
||||
+ * @oh: struct omap_hwmod *
|
||||
+ *
|
||||
+ * Wait for a module @oh to enter slave idle. Returns 0 if the module
|
||||
+ * does not have an IDLEST bit or if the module successfully enters
|
||||
+ * slave idle; otherwise, pass along the return value of the
|
||||
+ * appropriate *_cm*_wait_module_idle() function.
|
||||
+ */
|
||||
+static int _omap4_wait_target_disable(struct omap_hwmod *oh)
|
||||
+{
|
||||
+ if (!cpu_is_omap44xx())
|
||||
+ return 0;
|
||||
+
|
||||
+ if (!oh)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
|
||||
+ return 0;
|
||||
+
|
||||
+ if (oh->flags & HWMOD_NO_IDLEST)
|
||||
+ return 0;
|
||||
+
|
||||
+ return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
|
||||
+ oh->clkdm->cm_inst,
|
||||
+ oh->clkdm->clkdm_offs,
|
||||
+ oh->prcm.omap4.clkctrl_offs);
|
||||
+}
|
||||
+
|
||||
+/**
|
||||
+ * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
|
||||
* @oh: struct omap_hwmod *
|
||||
*
|
||||
* Disable the PRCM module mode related to the hwmod @oh.
|
||||
- * No return value.
|
||||
+ * Return EINVAL if the modulemode is not supported and 0 in case of success.
|
||||
*/
|
||||
-static void _disable_module(struct omap_hwmod *oh)
|
||||
+static int _omap4_disable_module(struct omap_hwmod *oh)
|
||||
{
|
||||
+ int v;
|
||||
+
|
||||
/* The module mode does not exist prior OMAP4 */
|
||||
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
|
||||
- return;
|
||||
+ if (!cpu_is_omap44xx())
|
||||
+ return -EINVAL;
|
||||
|
||||
if (!oh->clkdm || !oh->prcm.omap4.modulemode)
|
||||
- return;
|
||||
+ return -EINVAL;
|
||||
|
||||
- pr_debug("omap_hwmod: %s: _disable_module\n", oh->name);
|
||||
+ pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
|
||||
|
||||
omap4_cminst_module_disable(oh->clkdm->prcm_partition,
|
||||
oh->clkdm->cm_inst,
|
||||
oh->clkdm->clkdm_offs,
|
||||
oh->prcm.omap4.clkctrl_offs);
|
||||
+
|
||||
+ v = _omap4_wait_target_disable(oh);
|
||||
+ if (v)
|
||||
+ pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
|
||||
+ oh->name);
|
||||
+
|
||||
+ return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -1153,36 +1191,6 @@ static int _wait_target_ready(struct oma
|
||||
}
|
||||
|
||||
/**
|
||||
- * _wait_target_disable - wait for a module to be disabled
|
||||
- * @oh: struct omap_hwmod *
|
||||
- *
|
||||
- * Wait for a module @oh to enter slave idle. Returns 0 if the module
|
||||
- * does not have an IDLEST bit or if the module successfully enters
|
||||
- * slave idle; otherwise, pass along the return value of the
|
||||
- * appropriate *_cm*_wait_module_idle() function.
|
||||
- */
|
||||
-static int _wait_target_disable(struct omap_hwmod *oh)
|
||||
-{
|
||||
- /* TODO: For now just handle OMAP4+ */
|
||||
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
|
||||
- return 0;
|
||||
-
|
||||
- if (!oh)
|
||||
- return -EINVAL;
|
||||
-
|
||||
- if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
|
||||
- return 0;
|
||||
-
|
||||
- if (oh->flags & HWMOD_NO_IDLEST)
|
||||
- return 0;
|
||||
-
|
||||
- return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
|
||||
- oh->clkdm->cm_inst,
|
||||
- oh->clkdm->clkdm_offs,
|
||||
- oh->prcm.omap4.clkctrl_offs);
|
||||
-}
|
||||
-
|
||||
-/**
|
||||
* _lookup_hardreset - fill register bit info for this hwmod/reset line
|
||||
* @oh: struct omap_hwmod *
|
||||
* @name: name of the reset line in the context of this hwmod
|
||||
@@ -1524,8 +1532,6 @@ static int _enable(struct omap_hwmod *oh
|
||||
*/
|
||||
static int _idle(struct omap_hwmod *oh)
|
||||
{
|
||||
- int ret;
|
||||
-
|
||||
pr_debug("omap_hwmod: %s: idling\n", oh->name);
|
||||
|
||||
if (oh->_state != _HWMOD_STATE_ENABLED) {
|
||||
@@ -1537,11 +1543,9 @@ static int _idle(struct omap_hwmod *oh)
|
||||
if (oh->class->sysc)
|
||||
_idle_sysc(oh);
|
||||
_del_initiator_dep(oh, mpu_oh);
|
||||
- _disable_module(oh);
|
||||
- ret = _wait_target_disable(oh);
|
||||
- if (ret)
|
||||
- pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
|
||||
- oh->name);
|
||||
+
|
||||
+ _omap4_disable_module(oh);
|
||||
+
|
||||
/*
|
||||
* The module must be in idle mode before disabling any parents
|
||||
* clocks. Otherwise, the parent clock might be disabled before
|
||||
@@ -1642,11 +1646,7 @@ static int _shutdown(struct omap_hwmod *
|
||||
if (oh->_state == _HWMOD_STATE_ENABLED) {
|
||||
_del_initiator_dep(oh, mpu_oh);
|
||||
/* XXX what about the other system initiators here? dma, dsp */
|
||||
- _disable_module(oh);
|
||||
- ret = _wait_target_disable(oh);
|
||||
- if (ret)
|
||||
- pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
|
||||
- oh->name);
|
||||
+ _omap4_disable_module(oh);
|
||||
_disable_clocks(oh);
|
||||
if (oh->clkdm)
|
||||
clkdm_hwmod_disable(oh->clkdm, oh);
|
||||
@ -1,45 +0,0 @@
|
||||
--- a/arch/arm/mach-omap2/id.c
|
||||
+++ b/arch/arm/mach-omap2/id.c
|
||||
@@ -389,8 +389,10 @@ static void __init omap4_check_revision(
|
||||
omap_revision = OMAP4430_REV_ES2_1;
|
||||
break;
|
||||
case 4:
|
||||
- default:
|
||||
omap_revision = OMAP4430_REV_ES2_2;
|
||||
+ case 6:
|
||||
+ default:
|
||||
+ omap_revision = OMAP4430_REV_ES2_3;
|
||||
}
|
||||
break;
|
||||
case 0xb94e:
|
||||
@@ -403,7 +405,7 @@ static void __init omap4_check_revision(
|
||||
break;
|
||||
default:
|
||||
/* Unknown default to latest silicon rev as default */
|
||||
- omap_revision = OMAP4430_REV_ES2_2;
|
||||
+ omap_revision = OMAP4430_REV_ES2_3;
|
||||
}
|
||||
|
||||
pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16,
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
@@ -2257,7 +2257,8 @@ static struct omap_hwmod_class omap44xx_
|
||||
};
|
||||
|
||||
static struct omap_i2c_dev_attr i2c_dev_attr = {
|
||||
- .flags = OMAP_I2C_FLAG_BUS_SHIFT_NONE,
|
||||
+ .flags = OMAP_I2C_FLAG_BUS_SHIFT_NONE |
|
||||
+ OMAP_I2C_FLAG_RESET_REGS_POSTIDLE,
|
||||
};
|
||||
|
||||
/* i2c1 */
|
||||
--- a/arch/arm/plat-omap/include/plat/cpu.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/cpu.h
|
||||
@@ -391,6 +391,7 @@ IS_OMAP_TYPE(3517, 0x3517)
|
||||
#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8))
|
||||
#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8))
|
||||
#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8))
|
||||
+#define OMAP4430_REV_ES2_3 (OMAP443X_CLASS | (0x23 << 8))
|
||||
|
||||
#define OMAP446X_CLASS 0x44600044
|
||||
#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8))
|
||||
Loading…
Reference in New Issue