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@ -24,8 +24,8 @@
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.cpumask = cpu_all_mask,
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};
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@@ -215,6 +216,35 @@ static void __init cns3xxx_init_twd(void
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#endif
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@@ -213,6 +214,35 @@ static void __init cns3xxx_init_twd(void
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twd_local_timer_register(&cns3xx_twd_local_timer);
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}
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+static cycle_t cns3xxx_get_cycles(struct clocksource *cs)
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@ -60,7 +60,7 @@
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/*
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* Set up the clock source and clock events devices
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*/
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@@ -232,13 +262,12 @@ static void __init __cns3xxx_timer_init(
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@@ -230,13 +260,12 @@ static void __init __cns3xxx_timer_init(
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/* stop free running timer3 */
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writel(0, cns3xxx_tmr1 + TIMER_FREERUN_CONTROL_OFFSET);
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@ -77,7 +77,7 @@
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/* mask irq, non-mask timer1 overflow */
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irq_mask = readl(cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET);
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irq_mask &= ~(1 << 2);
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@@ -250,23 +279,9 @@ static void __init __cns3xxx_timer_init(
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@@ -248,23 +277,9 @@ static void __init __cns3xxx_timer_init(
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val |= (1 << 9);
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writel(val, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
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