ar71xx: fix PHY setup on TL-MR3020 (fixes #11572)

SVN-Revision: 32093

target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c

@@ -12,6 +12,7 @@
 #include <linux/gpio.h>
 
 #include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
 
 #include "dev-eth.h"
 #include "dev-gpio-buttons.h"
@@ -99,6 +100,8 @@ static void __init tl_mr3020_setup(void)
 	u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
 	u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
 
+	ath79_setup_ar933x_phy4_switch(false, true);
+
 	ath79_register_m25p80(&tl_mr3020_flash_data);
 	ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3020_leds_gpio),
 				 tl_mr3020_leds_gpio);
@@ -114,6 +117,7 @@ static void __init tl_mr3020_setup(void)
 
 	ath79_register_mdio(0, 0x0);
 	ath79_register_eth(0);
+	ath79_eth0_data.phy_mask = BIT(0);
 	ath79_register_wmac(ee, mac);
 }