ar71xx: fix ethernet PLL configuration for QCA956x

QCA956x is configured like AR934x, not like the older chips.
Should fix ethernet hangs when using the WAN port without SGMII

Signed-off-by: Felix Fietkau <nbd@nbd.name>

target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c

@@ -1096,7 +1096,7 @@ void __init ath79_register_eth(unsigned int id)
 			if (pdata->phy_if_mode == PHY_INTERFACE_MODE_SGMII)
 				pdata->set_speed = qca956x_set_speed_sgmii;
 			else
-				pdata->set_speed = ath79_set_speed_ge0;
+				pdata->set_speed = ar934x_set_speed_ge0;
 		} else {
 			pdata->reset_bit = QCA955X_RESET_GE1_MAC |
 					   QCA955X_RESET_GE1_MDIO;