ath79: add d-link dir-825-c1 and dir-835-a1
This commit ports both dir-825-c1 and dir-835-a1 from ar71xx to ath79. They're pretty much identical, except dir-835-a1 has less LEDs. The routers come with 128 MByte of RAM and 16 MBytes of flash and sport 2.4GHz and 5.0GHz wireless. Both routers have entries already in OpenWrt's TOH. Please check there for more information on these antiquities. https://openwrt.org/toh/hwdata/d-link/d-link_dir-825_c1 https://openwrt.org/toh/hwdata/d-link/d-link_dir-835_a1 Installation: 1. Connect to the web interface of the vendor firmware (usually listening on 192.168.0.1). 2. Go to "Tools", then "Firmware". 3. In the "Firmware Upgrade" box click "Browse". 4. Select the OpenWrt factory image for your router. 5. Click "Upload", confirm the popups if you agree to flash the file you selected. 6. Wait for firmware upgrade to complete. It takes about 5 minutes. Run-tested on dir-825-c1. dir-835-a1 should work as well, but I don't have this router so I can't confirm. Signed-off-by: Sebastian Kemper <sebastian_ml@gmx.net> Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [trivial changes]v19.07.3_mercusys_ac12_duma
Sebastian Kemper
5 years ago
committed by
Christian Lamparter
parent
247fdceab6
commit
6c3c4436ee
@ -0,0 +1,79 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "ar9344_dlink_dir-8x5.dtsi"
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/ {
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model = "D-LINK DIR-825 C1";
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compatible = "dlink,dir-825-c1", "qca,ar9344";
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aliases {
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led-boot = &orange_power;
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led-failsafe = &orange_power;
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led-running = &blue_power;
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led-upgrade = &orange_power;
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serial0 = &uart;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&enable_gpio_11>;
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blue_power: blue_power {
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label = "d-link:blue:power";
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gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
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};
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blue_usb {
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label = "d-link:blue:usb";
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gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "usbport";
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trigger-sources = <&hub_port1>;
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};
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blue_wan {
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label = "d-link:blue:wan";
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gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
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};
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blue_wlan2g {
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label = "d-link:blue:wlan2g";
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gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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blue_wps {
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label = "d-link:blue:wps";
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gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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};
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orange_power: orange_power {
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label = "d-link:orange:power";
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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};
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orange_wan {
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label = "d-link:orange:wan";
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gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
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};
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};
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leds-ath9k {
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compatible = "gpio-leds";
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blue_wlan5g {
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label = "d-link:blue:wlan5g";
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gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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};
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};
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&pinmux {
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enable_gpio_11: pinmux_enable_gpio_11 {
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pinctrl-single,bits = <0x8 0x0 0xff000000>;
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};
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};
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@ -0,0 +1,47 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "ar9344_dlink_dir-8x5.dtsi"
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/ {
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model = "D-LINK DIR-835 A1";
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compatible = "dlink,dir-835-a1", "qca,ar9344";
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aliases {
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led-boot = &orange_power;
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led-failsafe = &orange_power;
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led-running = &green_power;
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led-upgrade = &orange_power;
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serial0 = &uart;
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};
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leds {
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compatible = "gpio-leds";
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green_power: green_power {
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label = "d-link:green:power";
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gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
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};
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green_wan {
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label = "d-link:green:wan";
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gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
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};
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green_wps {
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label = "d-link:green:wps";
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gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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};
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orange_power: orange_power {
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label = "d-link:orange:power";
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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};
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orange_wan {
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label = "d-link:orange:wan";
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gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
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};
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};
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};
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@ -0,0 +1,151 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "ar9344.dtsi"
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/ {
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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keys {
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compatible = "gpio-keys";
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reset {
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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wps {
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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};
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ð0 {
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status = "okay";
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/* default for ar934x, except for 1000M */
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pll-data = <0x06000000 0x00000101 0x00001616>;
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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};
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&mdio0 {
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status = "okay";
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phy-mask = <0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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qca,ar8327-initvals = <
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/* GPL code drop (bsp.h & athrs17_phy.c) */
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0x10 0xc1000000 /* PWS_REG_VALUE */
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0x04 0x07600000 /* PORT0 PAD Mode */
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0x0c 0x01000000 /* PORT6 PAD Mode */
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0x7c 0x0000007e /* PORT0_STATUS */
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0x94 0x0000007e /* PORT6_STATUS */
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>;
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};
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};
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&pcie {
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status = "okay";
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ath9k: wifi@0,0 {
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compatible = "pci168c,0030";
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reg = <0x0000 0 0 0 0>;
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qca,no-eeprom;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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&ref {
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clock-frequency = <40000000>;
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};
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&spi {
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status = "okay";
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num-cs = <1>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <25000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "uboot";
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reg = <0x000000 0x010000>;
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read-only;
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};
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partition@10000 {
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label = "nvram";
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reg = <0x010000 0x010000>;
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read-only;
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};
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partition@20000 {
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label = "firmware";
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reg = <0x020000 0xF90000>;
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compatible = "denx,uimage";
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};
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partition@fb0000 {
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label = "lang";
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reg = <0xfb0000 0x030000>;
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read-only;
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};
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partition@fe0000 {
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label = "mac";
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reg = <0xfe0000 0x010000>;
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read-only;
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};
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partition@ff0000 {
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label = "art";
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reg = <0xff0000 0x010000>;
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read-only;
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};
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};
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};
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};
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&uart {
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status = "okay";
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};
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&usb {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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hub_port1: port@1 {
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reg = <1>;
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#trigger-source-cells = <0>;
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};
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};
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&usb_phy {
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status = "okay";
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};
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&wmac {
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status = "okay";
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qca,no-eeprom;
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};
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