ramips: add support for DLINK DWR-921-C1
The DWR-921-C1 Wireless Routers with LTE embedded modem is based on the
MT7620N SoC.
Specification:
* MediaTek MT7620N (580 Mhz)
* 64 MB of RAM
* 16 MB of FLASH
* 802.11bgn radio
* 5x 10/100 Mbps Ethernet (1 WAN and 4 LAN)
* 2x external, detachable (LTE) antennas
* UART header on PCB (57600 8n1)
* 6x LED (GPIO-controlled)
* 1x bi-color Signal Strength LED (GPIO-controlled)
* 2x button
* JBOOT bootloader
The status led has been assigned to the dwr-921-c1:green:sigstrength (lte
signal strength) led. At the end of the boot it is switched off and is
available for lte operation. Work correctly also during sysupgrade
operation.
Installation:
Apply factory image via d-link http web-gui.
How to revert to OEM firmware:
1.) Push the reset button and turn on the power. Wait until LED start
blinking (~10sec.)
2.) Upload original factory image via JBOOT http (IP: 192.168.123.254)
3.) If http doesn't work, it can be done with curl command:
curl -F FN=@XXXXX.bin http://192.168.123.254/upg
where XXXXX.bin is name of firmware file.
Signed-off-by: Giuseppe Lippolis <giu.lippolis@gmail.com>
v19.07.3_mercusys_ac12_duma
Giuseppe Lippolis
6 years ago
committed by
Mathias Kresin
parent
e9d5f8ebb2
commit
6525bffc0a
@ -0,0 +1,144 @@
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/dts-v1/;
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#include "mt7620n.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "dlink,dwr-921-c1", "ralink,mt7620n-soc";
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model = "D-Link DWR-921 C1";
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <20>;
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wps {
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label = "wps";
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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reset {
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label = "reset";
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gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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sms {
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label = "dwr-921-c1:green:sms";
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gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
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};
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lan {
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label = "dwr-921-c1:green:lan";
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gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
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};
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sstrengthg {
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label = "dwr-921-c1:green:sigstrength";
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gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
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};
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sstrengthr {
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label = "dwr-921-c1:red:sigstrength";
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gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
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};
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4g {
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label = "dwr-921-c1:green:4g";
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gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
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};
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3g {
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label = "dwr-921-c1:green:3g";
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gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
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};
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wifi {
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label = "dwr-921-c1:green:wifi";
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gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
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};
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};
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gpio_export {
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compatible = "gpio-export";
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#size-cells = <0>;
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lte_modem_enable {
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gpio-export,name = "lte_modem_enable";
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gpio-export,output = <1>;
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gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&gpio1 {
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status = "okay";
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};
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&gpio2 {
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status = "okay";
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};
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&gpio3 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partition@0 {
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label = "jboot";
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reg = <0x0 0x10000>;
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read-only;
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};
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partition@10000 {
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label = "firmware";
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reg = <0x10000 0xfe0000>;
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};
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config: partition@ff0000 {
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label = "config";
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reg = <0xff0000 0x10000>;
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read-only;
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};
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};
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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ðernet {
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port@4 {
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status = "okay";
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};
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};
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&pinctrl {
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state_default: pinctrl0 {
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default {
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ralink,group = "spi refclk", "i2c", "ephy", "wled";
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ralink,function = "gpio";
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};
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};
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};
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