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@ -2739,6 +2739,34 @@ static int msdc_drv_probe(struct platform_device *pdev)
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struct msdc_host *host;
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struct msdc_hw *hw;
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int ret, irq;
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u32 reg;
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printk("MTK MSDC device init.\n");
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mtk_sd_device.dev.platform_data = &msdc0_hw;
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if (ralink_soc == MT762X_SOC_MT7620A || ralink_soc == MT762X_SOC_MT7621AT) {
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//#if defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
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reg = sdr_read32((volatile u32*)(RALINK_SYSCTL_BASE + 0x60)) & ~(0x3<<18);
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//#if defined (CONFIG_RALINK_MT7620)
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if (ralink_soc == MT762X_SOC_MT7620A)
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reg |= 0x1<<18;
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//#endif
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} else {
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//#elif defined (CONFIG_RALINK_MT7628)
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/* TODO: maybe omitted when RAether already toggle AGPIO_CFG */
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reg = sdr_read32((volatile u32*)(RALINK_SYSCTL_BASE + 0x3c));
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reg |= 0x1e << 16;
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sdr_write32((volatile u32*)(RALINK_SYSCTL_BASE + 0x3c), reg);
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reg = sdr_read32((volatile u32*)(RALINK_SYSCTL_BASE + 0x60)) & ~(0x3<<10);
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#if defined (CONFIG_MTK_MMC_EMMC_8BIT)
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reg |= 0x3<<26 | 0x3<<28 | 0x3<<30;
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msdc0_hw.data_pins = 8,
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#endif
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//#endif
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}
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sdr_write32((volatile u32*)(RALINK_SYSCTL_BASE + 0x60), reg);
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//platform_device_register(&mtk_sd_device);
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/* end of +++ */
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pdev->dev.platform_data = &msdc0_hw;
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@ -2995,42 +3023,6 @@ static struct platform_driver mt_msdc_driver = {
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static int __init mt_msdc_init(void)
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{
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int ret;
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/* +++ by chhung */
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u32 reg;
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#if defined (CONFIG_MTD_ANY_RALINK)
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extern int ra_check_flash_type(void);
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if(ra_check_flash_type() == 2) { /* NAND */
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printk("%s: !!!!! SDXC Module Initialize Fail !!!!!", __func__);
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return 0;
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}
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#endif
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printk("MTK MSDC device init.\n");
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mtk_sd_device.dev.platform_data = &msdc0_hw;
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if (ralink_soc == MT762X_SOC_MT7620A || ralink_soc == MT762X_SOC_MT7621AT) {
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//#if defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
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reg = sdr_read32((volatile u32*)(RALINK_SYSCTL_BASE + 0x60)) & ~(0x3<<18);
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//#if defined (CONFIG_RALINK_MT7620)
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if (ralink_soc == MT762X_SOC_MT7620A)
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reg |= 0x1<<18;
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//#endif
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} else {
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//#elif defined (CONFIG_RALINK_MT7628)
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/* TODO: maybe omitted when RAether already toggle AGPIO_CFG */
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reg = sdr_read32((volatile u32*)(RALINK_SYSCTL_BASE + 0x3c));
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reg |= 0x1e << 16;
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sdr_write32((volatile u32*)(RALINK_SYSCTL_BASE + 0x3c), reg);
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reg = sdr_read32((volatile u32*)(RALINK_SYSCTL_BASE + 0x60)) & ~(0x3<<10);
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#if defined (CONFIG_MTK_MMC_EMMC_8BIT)
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reg |= 0x3<<26 | 0x3<<28 | 0x3<<30;
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msdc0_hw.data_pins = 8,
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#endif
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//#endif
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}
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sdr_write32((volatile u32*)(RALINK_SYSCTL_BASE + 0x60), reg);
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//platform_device_register(&mtk_sd_device);
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/* end of +++ */
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ret = platform_driver_register(&mt_msdc_driver);
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if (ret) {
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