Florian Fainelli
15 years ago
parent
144fd07cd8
commit
5a481b16ad
@ -0,0 +1,178 @@
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/*
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* Copyright (C) 2008 Stanley Pinchak <stanley_dot_pinchak_at_gmail_dot_com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef __AR7_TITAN_H__
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#define __AR7_TITAN_H__
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#ifndef __AR7_GPIO_H__
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#include <asm/ar7/gpio.h>
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#endif
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typedef enum TITAN_GPIO_PIN_MODE_tag
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{
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FUNCTIONAL_PIN = 0,
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GPIO_PIN = 1
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} TITAN_GPIO_PIN_MODE_T;
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typedef enum TITAN_GPIO_PIN_DIRECTION_tag
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{
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GPIO_OUTPUT_PIN = 0,
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GPIO_INPUT_PIN = 1
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} TITAN_GPIO_PIN_DIRECTION_T;
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/**********************************************************************
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* GPIO Control
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**********************************************************************/
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typedef struct
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{
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int pinSelReg;
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int shift;
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int func;
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} GPIO_CFG;
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static GPIO_CFG gptable[]= {
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/* PIN_SEL_REG, START_BIT, GPIO_CFG_MUX_VALUE */
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{4,24,1},
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{4,26,1},
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{4,28,1},
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{4,30,1},
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{5,6,1},
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{5,8,1},
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{5,10,1},
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{5,12,1},
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{7,14,3},
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{7,16,3},
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{7,18,3},
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{7,20,3},
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{7,22,3},
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{7,26,3},
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{7,28,3},
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{7,30,3},
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{8,0,3},
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{8,2,3},
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{8,4,3},
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{8,10,3},
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{8,14,3},
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{8,16,3},
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{8,18,3},
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{8,20,3},
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{9,8,3},
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{9,10,3},
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{9,12,3},
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{9,14,3},
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{9,18,3},
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{9,20,3},
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{9,24,3},
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{9,26,3},
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{9,28,3},
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{9,30,3},
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{10,0,3},
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{10,2,3},
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{10,8,3},
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{10,10,3},
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{10,12,3},
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{10,14,3},
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{13,12,3},
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{13,14,3},
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{13,16,3},
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{13,18,3},
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{13,24,3},
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{13,26,3},
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{13,28,3},
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{13,30,3},
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{14,2,3},
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{14,6,3},
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{14,8,3},
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{14,12,3}
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};
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typedef struct
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{
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volatile unsigned int reg[21];
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}
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PIN_SEL_REG_ARRAY_T;
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typedef struct
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{
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unsigned int data_in [2];
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unsigned int data_out[2];
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unsigned int dir[2];
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unsigned int enable[2];
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} TITAN_GPIO_CONTROL_T;
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#define AVALANCHE_PIN_SEL_BASE 0xA861160C /*replace with KSEG1ADDR()*/
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static inline int titan_gpio_ctrl(unsigned int gpio_pin, TITAN_GPIO_PIN_MODE_T pin_mode,
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TITAN_GPIO_PIN_DIRECTION_T pin_direction)
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{
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int reg_index = 0;
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int mux_status;
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GPIO_CFG gpio_cfg;
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volatile PIN_SEL_REG_ARRAY_T *pin_sel_array = (PIN_SEL_REG_ARRAY_T*) AVALANCHE_PIN_SEL_BASE;
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volatile TITAN_GPIO_CONTROL_T *gpio_cntl = (TITAN_GPIO_CONTROL_T*) KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_INPUT_0);
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if (gpio_pin > 51 )
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return(-1);
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gpio_cfg = gptable[gpio_pin];
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mux_status = (pin_sel_array->reg[gpio_cfg.pinSelReg - 1] >> gpio_cfg.shift) & 0x3;
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if(!((mux_status == 0 /* tri-stated */ ) || (mux_status == gpio_cfg.func /*GPIO functionality*/)))
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{
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return(-1); /* Pin have been configured for non GPIO funcs. */
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}
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/* Set the pin to be used as GPIO. */
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pin_sel_array->reg[gpio_cfg.pinSelReg - 1] |= ((gpio_cfg.func & 0x3) << gpio_cfg.shift);
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/* Check whether gpio refers to the first GPIO reg or second. */
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if(gpio_pin > 31)
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{
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reg_index = 1;
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gpio_pin -= 32;
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}
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if(pin_mode)
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gpio_cntl->enable[reg_index] |= (1 << gpio_pin); /* Enable */
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else
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gpio_cntl->enable[reg_index] &= ~(1 << gpio_pin);
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if(pin_direction)
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gpio_cntl->dir[reg_index] |= (1 << gpio_pin); /* Input */
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else
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gpio_cntl->dir[reg_index] &= ~(1 << gpio_pin);
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return(0);
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}/* end of function titan_gpio_ctrl */
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static inline int titan_sysGpioInValue(unsigned int *in_val, unsigned int reg_index)
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{
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volatile TITAN_GPIO_CONTROL_T *gpio_cntl = (TITAN_GPIO_CONTROL_T*) KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_INPUT_0);
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if(reg_index > 1)
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return (-1);
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*in_val = gpio_cntl->data_in[reg_index];
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return (0);
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}
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#endif
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@ -0,0 +1,248 @@
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--- a/arch/mips/ar7/platform.c 2009-11-18 14:57:44.000000000 +0800
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+++ b/arch/mips/ar7/platform.c 2009-11-18 15:43:04.000000000 +0800
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@@ -128,6 +128,36 @@
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},
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};
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+static struct resource cpmac_low_res_titan[] = {
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+ {
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+ .name = "regs",
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+ .flags = IORESOURCE_MEM,
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+ .start = TITAN_REGS_MAC0,
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+ .end = TITAN_REGS_MAC0 + 0x7ff,
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+ },
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+ {
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+ .name = "irq",
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+ .flags = IORESOURCE_IRQ,
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+ .start = 27,
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+ .end = 27,
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+ },
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+};
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+
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+static struct resource cpmac_high_res_titan[] = {
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+ {
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+ .name = "regs",
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+ .flags = IORESOURCE_MEM,
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+ .start = TITAN_REGS_MAC1,
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+ .end = TITAN_REGS_MAC1 + 0x7ff,
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+ },
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+ {
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+ .name = "irq",
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+ .flags = IORESOURCE_IRQ,
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+ .start = 41,
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+ .end = 41,
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+ },
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+};
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+
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static struct resource vlynq_low_res[] = {
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{
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.name = "regs",
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@@ -182,6 +212,60 @@
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},
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};
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+static struct resource vlynq_low_res_titan[] = {
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+ {
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+ .name = "regs",
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+ .flags = IORESOURCE_MEM,
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+ .start = TITAN_REGS_VLYNQ0,
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+ .end = TITAN_REGS_VLYNQ0 + 0xff,
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+ },
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+ {
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+ .name = "irq",
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+ .flags = IORESOURCE_IRQ,
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+ .start = 33,
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+ .end = 33,
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+ },
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+ {
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+ .name = "mem",
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+ .flags = IORESOURCE_MEM,
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+ .start = 0x0c000000,
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+ .end = 0x0fffffff,
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+ },
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+ {
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+ .name = "devirq",
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+ .flags = IORESOURCE_IRQ,
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+ .start = 80,
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+ .end = 111,
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+ },
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+};
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+
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+static struct resource vlynq_high_res_titan[] = {
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+ {
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+ .name = "regs",
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+ .flags = IORESOURCE_MEM,
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+ .start = TITAN_REGS_VLYNQ1,
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+ .end = TITAN_REGS_VLYNQ1 + 0xff,
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+ },
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+ {
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+ .name = "irq",
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+ .flags = IORESOURCE_IRQ,
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+ .start = 34,
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+ .end = 34,
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+ },
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+ {
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+ .name = "mem",
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+ .flags = IORESOURCE_MEM,
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+ .start = 0x40000000,
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+ .end = 0x43ffffff,
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+ },
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+ {
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+ .name = "devirq",
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+ .flags = IORESOURCE_IRQ,
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+ .start = 112,
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+ .end = 143,
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+ },
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+};
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+
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static struct resource usb_res[] = {
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{
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.name = "regs",
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@@ -226,6 +310,18 @@
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.phy_mask = 0x7fffffff,
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};
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+static struct plat_cpmac_data cpmac_low_data_titan = {
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+ .reset_bit = 17,
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+ .power_bit = 20,
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+ .phy_mask = 0x40000000,
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+};
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+
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+static struct plat_cpmac_data cpmac_high_data_titan = {
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+ .reset_bit = 21,
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+ .power_bit = 22,
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+ .phy_mask = 0x80000000,
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+};
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+
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static struct plat_vlynq_data vlynq_low_data = {
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.ops.on = vlynq_on,
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.ops.off = vlynq_off,
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@@ -240,6 +336,20 @@
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.gpio_bit = 19,
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};
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+static struct plat_vlynq_data vlynq_low_data_titan = {
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+ .ops.on = vlynq_on,
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+ .ops.off = vlynq_off,
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+ .reset_bit = 15,
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+ .gpio_bit = 14,
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+};
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+
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+static struct plat_vlynq_data vlynq_high_data_titan = {
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+ .ops.on = vlynq_on,
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+ .ops.off = vlynq_off,
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+ .reset_bit = 16,
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+ .gpio_bit = 7,
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+};
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+
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static struct platform_device physmap_flash = {
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.id = 0,
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.name = "physmap-flash",
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@@ -273,6 +383,30 @@
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.num_resources = ARRAY_SIZE(cpmac_high_res),
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};
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+static struct platform_device cpmac_low_titan = {
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+ .id = 0,
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+ .name = "cpmac",
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+ .dev = {
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+ .dma_mask = &cpmac_dma_mask,
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+ .coherent_dma_mask = DMA_32BIT_MASK,
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+ .platform_data = &cpmac_low_data_titan,
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+ },
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+ .resource = cpmac_low_res_titan,
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+ .num_resources = ARRAY_SIZE(cpmac_low_res_titan),
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+};
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+
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+static struct platform_device cpmac_high_titan = {
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+ .id = 1,
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+ .name = "cpmac",
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+ .dev = {
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+ .dma_mask = &cpmac_dma_mask,
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+ .coherent_dma_mask = DMA_32BIT_MASK,
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+ .platform_data = &cpmac_high_data_titan,
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+ },
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+ .resource = cpmac_high_res_titan,
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+ .num_resources = ARRAY_SIZE(cpmac_high_res_titan),
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+};
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+
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static struct platform_device vlynq_low = {
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.id = 0,
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.name = "vlynq",
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@@ -289,6 +423,22 @@
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.num_resources = ARRAY_SIZE(vlynq_high_res),
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};
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+static struct platform_device vlynq_low_titan = {
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+ .id = 0,
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+ .name = "vlynq",
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+ .dev.platform_data = &vlynq_low_data_titan,
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+ .resource = vlynq_low_res_titan,
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+ .num_resources = ARRAY_SIZE(vlynq_low_res_titan),
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+};
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+
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+static struct platform_device vlynq_high_titan = {
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+ .id = 1,
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+ .name = "vlynq",
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+ .dev.platform_data = &vlynq_high_data_titan,
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+ .resource = vlynq_high_res_titan,
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+ .num_resources = ARRAY_SIZE(vlynq_high_res_titan),
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+};
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+
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/* This is proper way to define uart ports, but they are then detected
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* as xscale and, obviously, don't work...
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@@ -333,6 +483,11 @@
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{ .name = "status", .gpio = 8, .active_low = 1, },
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};
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+static struct gpio_led titan_leds[] = {
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+ { .name = "status", .gpio = 8, .active_low = 1, },
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+ { .name = "wifi", .gpio = 13, .active_low = 1, },
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+};
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+
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static struct gpio_led dsl502t_leds[] = {
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{ .name = "status", .gpio = 9, .active_low = 1, },
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{ .name = "ethernet", .gpio = 7, .active_low = 1, },
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@@ -425,7 +580,7 @@
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/* FIXME: the whole thing is unreliable */
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prId = prom_getenv("ProductID");
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usb_prod = prom_getenv("usb_prod");
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-
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+
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/* If we can't get the product id from PROM, use the default LEDs */
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if (!prId)
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return;
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@@ -442,6 +597,9 @@
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} else if (strstr(prId, "DG834")) {
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ar7_led_data.num_leds = ARRAY_SIZE(dg834g_leds);
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ar7_led_data.leds = dg834g_leds;
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+ } else if (strstr(prId, "CYWM")) {
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+ ar7_led_data.num_leds = ARRAY_SIZE(titan_leds);
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+ ar7_led_data.leds = titan_leds;
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}
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}
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@@ -502,14 +660,18 @@
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if (res)
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return res;
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- ar7_device_disable(vlynq_low_data.reset_bit);
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- res = platform_device_register(&vlynq_low);
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+ ar7_device_disable(ar7_is_titan() ? vlynq_low_data_titan.reset_bit :
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+ vlynq_low_data.reset_bit);
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+ res = platform_device_register(ar7_is_titan() ? &vlynq_low_titan :
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+ &vlynq_low);
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if (res)
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return res;
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if (ar7_has_high_vlynq()) {
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- ar7_device_disable(vlynq_high_data.reset_bit);
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- res = platform_device_register(&vlynq_high);
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+ ar7_device_disable(ar7_is_titan() ? vlynq_high_data_titan.reset_bit :
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+ vlynq_high_data.reset_bit);
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+ res = platform_device_register(ar7_is_titan() ? &vlynq_high_titan :
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+ &vlynq_high);
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if (res)
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return res;
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}
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@ -0,0 +1,66 @@
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--- a/arch/mips/ar7/platform.c 2009-11-18 15:47:42.000000000 +0800
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+++ b/arch/mips/ar7/platform.c 2009-11-19 00:56:05.000000000 +0800
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@@ -677,24 +677,32 @@
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}
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if (ar7_has_high_cpmac()) {
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- res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
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+ res = fixed_phy_add(PHY_POLL, ar7_is_titan()?cpmac_high_titan.id: cpmac_high.id, &fixed_phy_status);
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if (res && res != -ENODEV)
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return res;
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- cpmac_get_mac(1, cpmac_high_data.dev_addr);
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- res = platform_device_register(&cpmac_high);
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+ cpmac_get_mac(1, ar7_is_titan() ? cpmac_high_data_titan.dev_addr:
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+ cpmac_high_data.dev_addr);
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+ res = platform_device_register(ar7_is_titan() ? &cpmac_high_titan :
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+ &cpmac_high);
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if (res)
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return res;
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} else {
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- cpmac_low_data.phy_mask = 0xffffffff;
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- }
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+ if (ar7_is_titan())
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+ cpmac_low_data_titan.phy_mask = 0xffffffff;
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+ else
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+ cpmac_low_data.phy_mask = 0xffffffff;
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+ }
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- res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status);
|
||||
+ res = fixed_phy_add(PHY_POLL, ar7_is_titan()?cpmac_low_titan.id:
|
||||
+ cpmac_low.id, &fixed_phy_status);
|
||||
if (res && res != -ENODEV)
|
||||
return res;
|
||||
|
||||
- cpmac_get_mac(0, cpmac_low_data.dev_addr);
|
||||
- res = platform_device_register(&cpmac_low);
|
||||
+ cpmac_get_mac(0, ar7_is_titan() ? cpmac_low_data_titan.dev_addr :
|
||||
+ cpmac_low_data.dev_addr);
|
||||
+ res = platform_device_register(ar7_is_titan() ? &cpmac_low_titan :
|
||||
+ &cpmac_low);
|
||||
if (res)
|
||||
return res;
|
||||
|
||||
--- a/drivers/net/cpmac.c 2009-11-18 15:47:42.000000000 +0800
|
||||
+++ b/drivers/net/cpmac.c 2009-11-19 00:58:25.000000000 +0800
|
||||
@@ -1236,6 +1236,10 @@
|
||||
ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
|
||||
ar7_device_reset(AR7_RESET_BIT_EPHY);
|
||||
|
||||
+ if (ar7_is_titan()) {
|
||||
+ ar7_device_reset(TITAN_RESET_BIT_EPHY1);
|
||||
+ }
|
||||
+
|
||||
cpmac_mii->reset(cpmac_mii);
|
||||
|
||||
for (i = 0; i < 300; i++)
|
||||
@@ -1250,7 +1254,8 @@
|
||||
mask = 0;
|
||||
}
|
||||
|
||||
- cpmac_mii->phy_mask = ~(mask | 0x80000000);
|
||||
+ cpmac_mii->phy_mask = ar7_is_titan()? ~(mask | 0x80000000 | 0x40000000):
|
||||
+ ~(mask | 0x80000000);
|
||||
snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1");
|
||||
|
||||
res = mdiobus_register(cpmac_mii);
|
||||
Loading…
Reference in New Issue