ramips: Add support for Head Weblink HDRM200
Head Weblink HDRM200 is a dual-sim router based on MT7620A. The detailed specifications are: - MT7620A (580MHz) - 64MB RAM - 16MB of flash (SPI NOR) - 6x 10/100Mbps Ethernet (MT7620A built-in switch) - 1x microSD slot - 1x miniPCIe slot (only USB2.0 bus). Device is shipped with a SIMCOM SIM7100E LTE modem. - 2x SIM slots (standard size) - 1x USB2.0 port - 1x 2.4GHz wifi (rt2800) - 1x 5GHz wifi (mt7612) - 1x reset button - 1x WPS button - 3x GPIO-controllable LEDs - 1x 10 pin terminal block (RS232, RS485, 4 x GPIO) Tested: - Ethernet switch - Wifi - USB slot - SD card slot - miniPCIe-slot - sysupgrade - reset button Installation instructions: Installing OpenWRT for the first time requires a bit of work, as the board does not ship with OpenWRT. In addition, the bootloader automatically reboots when installing an image over tftp. In order to install OpenWRT on the HDRM200, you need to do the following: * Copy the initramfs-image to your tftp-root (default filename is test.bin) and configure networking accordingly (default server IP is 10.10.10.3, client 10.10.10.123). Start your tftp server. * Open the board and connect to UART. The pins are exposed and clearly marked. * Boot the board and press 1. * Either use the default filename and client/server IP-addresses, or specify your own. The image should now be loaded to memory and board boot. If the router reboots while the image is loading, you need to try again. Once the board has booted, copy the sysupgrade-image to the router and run sysupgrade in order to install OpenWRT to the flash. Notes: - You control which SIM slot to use by writing 0/1 to /sys/class/gpio/gpio0/value. In order for the change to take effect, you can either use AT-commands (AT+CFUN) or power-cycle the modem (write 0/1 to /sys/class/gpio/gpio21/value). - RS485 is available on /dev/ttyS0. - RS232 is available on /dev/ttyS1. - The name of the ioX-gpios map to the labels on the casing. Signed-off-by: Kristian Evensen <kristian.evensen@gmail.com> [fixed whitespace issue and merge conflict in target.mk] Signed-off-by: Petr Štetiar <ynezz@true.cz>v19.07.3_mercusys_ac12_duma
Kristian Evensen
5 years ago
committed by
Petr Štetiar
parent
782eda9750
commit
52b59a984f
@ -0,0 +1,188 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "mt7620a.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "head-weblink,hdrm200", "ralink,mt7620a-soc";
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model = "Head Weblink HDRM200";
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aliases {
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led-boot = &led_system;
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led-failsafe = &led_system;
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led-running = &led_system;
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led-upgrade = &led_system;
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};
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chosen {
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bootargs = "console=ttyS1,57600";
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};
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leds {
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compatible = "gpio-leds";
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rssi {
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label = "hdrm200:red:rssi";
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gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
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};
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led_system: system {
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label = "hdrm200:green:system";
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gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
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};
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air {
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label = "hdrm200:green:wifi";
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gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys-polled";
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poll-interval = <20>;
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wps {
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label = "wps";
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gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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reset {
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label = "reset";
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gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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firmware: partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0xfb0000>;
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};
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};
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};
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&gpio3 {
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status = "okay";
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};
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&sdhci {
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status = "okay";
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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ðernet {
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status = "okay";
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mtd-mac-address = <&factory 0x4>;
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
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port@4 {
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status = "okay";
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phy-handle = <&phy4>;
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phy-mode = "rgmii";
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};
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port@5 {
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status = "okay";
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phy-handle = <&phy5>;
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phy-mode = "rgmii";
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};
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mdio-bus {
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status = "okay";
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phy4: ethernet-phy@4 {
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reg = <4>;
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phy-mode = "rgmii";
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};
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phy5: ethernet-phy@5 {
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reg = <5>;
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phy-mode = "rgmii";
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};
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};
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};
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&wmac {
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ralink,mtd-eeprom = <&factory 0>;
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};
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&pinctrl {
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state_default: pinctrl0 {
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default {
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ralink,group = "i2c", "uartf", "pa", "spi refclk",
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"wled";
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ralink,function = "gpio";
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x8000>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&uart {
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status = "okay";
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};
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