ath9k: merge fix for noise floor calibration
Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 48641v19.07.3_mercusys_ac12_duma
Felix Fietkau
8 years ago
parent
d99cdd4fef
commit
522bba5e42
@ -0,0 +1,87 @@
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From: Miaoqing Pan <miaoqing@codeaurora.org>
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Date: Fri, 5 Feb 2016 09:45:50 +0800
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Subject: [PATCH] ath9k: make NF load complete quickly and reliably
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Make NF load complete quickly and reliably. NF load execution
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is delayed by HW to end of frame if frame Rx or Tx is ongoing.
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Increasing timeout to max frame duration. If NF cal is ongoing
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before NF load, stop it before load, and restart it afterwards.
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Signed-off-by: Miaoqing Pan <miaoqing@codeaurora.org>
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---
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--- a/drivers/net/wireless/ath/ath9k/calib.c
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+++ b/drivers/net/wireless/ath/ath9k/calib.c
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@@ -241,6 +241,7 @@ int ath9k_hw_loadnf(struct ath_hw *ah, s
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u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
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struct ath_common *common = ath9k_hw_common(ah);
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s16 default_nf = ath9k_hw_get_default_nf(ah, chan);
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+ u32 bb_agc_ctl = REG_READ(ah, AR_PHY_AGC_CONTROL);
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if (ah->caldata)
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h = ah->caldata->nfCalHist;
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@@ -264,6 +265,16 @@ int ath9k_hw_loadnf(struct ath_hw *ah, s
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}
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/*
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+ * stop NF cal if ongoing to ensure NF load completes immediately
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+ * (or after end rx/tx frame if ongoing)
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+ */
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+ if (bb_agc_ctl & AR_PHY_AGC_CONTROL_NF) {
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+ REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
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+ REG_RMW_BUFFER_FLUSH(ah);
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+ ENABLE_REG_RMW_BUFFER(ah);
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+ }
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+
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+ /*
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* Load software filtered NF value into baseband internal minCCApwr
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* variable.
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*/
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@@ -276,18 +287,33 @@ int ath9k_hw_loadnf(struct ath_hw *ah, s
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/*
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* Wait for load to complete, should be fast, a few 10s of us.
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- * The max delay was changed from an original 250us to 10000us
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- * since 250us often results in NF load timeout and causes deaf
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- * condition during stress testing 12/12/2009
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+ * The max delay was changed from an original 250us to 22.2 msec.
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+ * This would increase timeout to the longest possible frame
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+ * (11n max length 22.1 msec)
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*/
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- for (j = 0; j < 10000; j++) {
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+ for (j = 0; j < 22200; j++) {
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if ((REG_READ(ah, AR_PHY_AGC_CONTROL) &
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- AR_PHY_AGC_CONTROL_NF) == 0)
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+ AR_PHY_AGC_CONTROL_NF) == 0)
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break;
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udelay(10);
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}
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/*
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+ * Restart NF so it can continue.
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+ */
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+ if (bb_agc_ctl & AR_PHY_AGC_CONTROL_NF) {
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+ ENABLE_REG_RMW_BUFFER(ah);
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+ if (bb_agc_ctl & AR_PHY_AGC_CONTROL_ENABLE_NF)
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+ REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
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+ AR_PHY_AGC_CONTROL_ENABLE_NF);
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+ if (bb_agc_ctl & AR_PHY_AGC_CONTROL_NO_UPDATE_NF)
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+ REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
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+ AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
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+ REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
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+ REG_RMW_BUFFER_FLUSH(ah);
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+ }
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+
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+ /*
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* We timed out waiting for the noisefloor to load, probably due to an
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* in-progress rx. Simply return here and allow the load plenty of time
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* to complete before the next calibration interval. We need to avoid
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@@ -296,7 +322,7 @@ int ath9k_hw_loadnf(struct ath_hw *ah, s
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* here, the baseband nf cal will just be capped by our present
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* noisefloor until the next calibration timer.
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*/
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- if (j == 10000) {
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+ if (j == 22200) {
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ath_dbg(common, ANY,
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"Timeout while waiting for nf to load: AR_PHY_AGC_CONTROL=0x%x\n",
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REG_READ(ah, AR_PHY_AGC_CONTROL));
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