ramips: Add support for mt7621 to lzma-loader
Signed-off-by: Tobias Schramm <tobleminer@gmail.com>v19.07.3_mercusys_ac12_duma
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/*
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* Arch specific code for mt7621 based boards, based on code for Ralink boards
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*
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* Copyright (C) 2018 Tobias Schramm <tobleminer@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <stddef.h>
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#include <stdint.h>
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#include "config.h"
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#define READREG(r) *(volatile uint32_t *)(r)
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#define WRITEREG(r,v) *(volatile uint32_t *)(r) = v
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#define KSEG1ADDR(_x) (((_x) & 0x1fffffff) | 0xa0000000)
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#define UART_BASE 0xBE000C00
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#define UART_TBR_OFFSET 0x00
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#define UART_LSR_OFFSET 0x14
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#define UART_LSR_TEMT (1 << 6)
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#define UART_READ(r) READREG(UART_BASE + (r))
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#define UART_WRITE(r,v) WRITEREG(UART_BASE + (r), (v))
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void board_putc(int ch)
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{
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while (((UART_READ(UART_LSR_OFFSET)) & UART_LSR_TEMT) == 0);
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UART_WRITE(UART_TBR_OFFSET, ch);
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while (((UART_READ(UART_LSR_OFFSET)) & UART_LSR_TEMT) == 0);
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}
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void board_init(void)
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{
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}
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@ -0,0 +1 @@
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CACHE_FLAGS+=-DCONFIG_ICACHE_SIZE="(32 * 1024)" -DCONFIG_DCACHE_SIZE="(16 * 1024)" -DCONFIG_CACHELINE_SIZE=32
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