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@ -4415,3 +4415,96 @@
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if (len > size)
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len = size;
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--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
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@@ -701,6 +701,54 @@ static int ar9550_hw_get_modes_txgain_in
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return ret;
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}
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+static void ar9003_doubler_fix(struct ath_hw *ah)
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+{
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+ if (AR_SREV_9300(ah) || AR_SREV_9580(ah) || AR_SREV_9550(ah)) {
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+ REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2,
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+ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
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+ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
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+ REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2,
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+ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
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+ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
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+ REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2,
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+ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
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+ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
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+
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+ udelay(200);
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+
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+ REG_CLR_BIT(ah, AR_PHY_65NM_CH0_RXTX2,
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+ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
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+ REG_CLR_BIT(ah, AR_PHY_65NM_CH1_RXTX2,
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+ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
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+ REG_CLR_BIT(ah, AR_PHY_65NM_CH2_RXTX2,
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+ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
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+
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+ udelay(1);
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+
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+ REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX2,
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+ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
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+ REG_RMW_FIELD(ah, AR_PHY_65NM_CH1_RXTX2,
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+ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
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+ REG_RMW_FIELD(ah, AR_PHY_65NM_CH2_RXTX2,
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+ AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
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+
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+ udelay(200);
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+
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+ REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_SYNTH12,
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+ AR_PHY_65NM_CH0_SYNTH12_VREFMUL3, 0xf);
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+
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+ REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2, 0,
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+ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
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+ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
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+ REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2, 0,
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+ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
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+ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
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+ REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2, 0,
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+ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
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+ 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
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+ }
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+}
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+
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static int ar9003_hw_process_ini(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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@@ -726,6 +774,8 @@ static int ar9003_hw_process_ini(struct
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modesIndex);
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}
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+ ar9003_doubler_fix(ah);
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+
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/*
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* RXGAIN initvals.
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*/
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--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
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+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
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@@ -656,13 +656,24 @@
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#define AR_PHY_SYNTH4_LONG_SHIFT_SELECT ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x00000001 : 0x00000002)
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#define AR_PHY_SYNTH4_LONG_SHIFT_SELECT_S ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0 : 1)
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#define AR_PHY_65NM_CH0_SYNTH7 0x16098
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+#define AR_PHY_65NM_CH0_SYNTH12 0x160ac
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#define AR_PHY_65NM_CH0_BIAS1 0x160c0
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#define AR_PHY_65NM_CH0_BIAS2 0x160c4
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#define AR_PHY_65NM_CH0_BIAS4 0x160cc
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+#define AR_PHY_65NM_CH0_RXTX2 0x16104
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+#define AR_PHY_65NM_CH1_RXTX2 0x16504
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+#define AR_PHY_65NM_CH2_RXTX2 0x16904
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#define AR_PHY_65NM_CH0_RXTX4 0x1610c
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#define AR_PHY_65NM_CH1_RXTX4 0x1650c
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#define AR_PHY_65NM_CH2_RXTX4 0x1690c
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+#define AR_PHY_65NM_CH0_SYNTH12_VREFMUL3 0x00780000
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+#define AR_PHY_65NM_CH0_SYNTH12_VREFMUL3_S 19
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+#define AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK 0x00000004
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+#define AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S 2
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+#define AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK 0x00000008
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+#define AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S 3
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+
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#define AR_CH0_TOP (AR_SREV_9300(ah) ? 0x16288 : \
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(((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x1628c : 0x16280)))
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#define AR_CH0_TOP_XPABIASLVL (AR_SREV_9550(ah) ? 0x3c0 : 0x300)
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