lantiq: fix dma locking problems with SMP
The DMA controller used only local locks, which will not lock the section against other CPUs, fix this by using spin locks. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>v19.07.3_mercusys_ac12_duma
Hauke Mehrtens
8 years ago
parent
828a471e8d
commit
2dac67464d
@ -0,0 +1,152 @@
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From 58078a30038b578c26c532545448fe3746648390 Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Thu, 29 Dec 2016 21:02:57 +0100
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Subject: [PATCH] MIPS: lantiq: lock DMA register accesses for SMP
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The DMA controller channel and port configuration is changed by
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selecting the port or channel in one register and then update the
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configuration in other registers. This has to be done in an atomic
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operation. Previously only the local interrupts were deactivated which
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works for single CPU systems. If the system supports SMP a better
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locking is needed, use spinlocks instead.
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On more recent SoCs (at least xrx200 and later) there are two memory
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regions to change the configuration, there we could use one area for
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each CPU and do not have to synchronize between the CPUs and more.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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arch/mips/lantiq/xway/dma.c | 38 ++++++++++++++++++++------------------
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1 file changed, 20 insertions(+), 18 deletions(-)
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--- a/arch/mips/lantiq/xway/dma.c
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+++ b/arch/mips/lantiq/xway/dma.c
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@@ -20,6 +20,7 @@
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#include <linux/io.h>
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#include <linux/dma-mapping.h>
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#include <linux/module.h>
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+#include <linux/spinlock.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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@@ -59,16 +60,17 @@
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ltq_dma_membase + (z))
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static void __iomem *ltq_dma_membase;
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+static DEFINE_SPINLOCK(ltq_dma_lock);
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void
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ltq_dma_enable_irq(struct ltq_dma_channel *ch)
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{
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unsigned long flags;
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- local_irq_save(flags);
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+ spin_lock_irqsave(<q_dma_lock, flags);
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ltq_dma_w32(ch->nr, LTQ_DMA_CS);
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ltq_dma_w32_mask(0, 1 << ch->nr, LTQ_DMA_IRNEN);
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- local_irq_restore(flags);
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+ spin_unlock_irqrestore(<q_dma_lock, flags);
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}
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EXPORT_SYMBOL_GPL(ltq_dma_enable_irq);
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@@ -77,10 +79,10 @@ ltq_dma_disable_irq(struct ltq_dma_chann
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{
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unsigned long flags;
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- local_irq_save(flags);
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+ spin_lock_irqsave(<q_dma_lock, flags);
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ltq_dma_w32(ch->nr, LTQ_DMA_CS);
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ltq_dma_w32_mask(1 << ch->nr, 0, LTQ_DMA_IRNEN);
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- local_irq_restore(flags);
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+ spin_unlock_irqrestore(<q_dma_lock, flags);
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}
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EXPORT_SYMBOL_GPL(ltq_dma_disable_irq);
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@@ -89,10 +91,10 @@ ltq_dma_ack_irq(struct ltq_dma_channel *
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{
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unsigned long flags;
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- local_irq_save(flags);
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+ spin_lock_irqsave(<q_dma_lock, flags);
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ltq_dma_w32(ch->nr, LTQ_DMA_CS);
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ltq_dma_w32(DMA_IRQ_ACK, LTQ_DMA_CIS);
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- local_irq_restore(flags);
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+ spin_unlock_irqrestore(<q_dma_lock, flags);
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}
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EXPORT_SYMBOL_GPL(ltq_dma_ack_irq);
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@@ -101,11 +103,11 @@ ltq_dma_open(struct ltq_dma_channel *ch)
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{
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unsigned long flag;
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- local_irq_save(flag);
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+ spin_lock_irqsave(<q_dma_lock, flag);
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ltq_dma_w32(ch->nr, LTQ_DMA_CS);
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ltq_dma_w32_mask(0, DMA_CHAN_ON, LTQ_DMA_CCTRL);
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- ltq_dma_enable_irq(ch);
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- local_irq_restore(flag);
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+ ltq_dma_w32_mask(0, 1 << ch->nr, LTQ_DMA_IRNEN);
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+ spin_unlock_irqrestore(<q_dma_lock, flag);
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}
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EXPORT_SYMBOL_GPL(ltq_dma_open);
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@@ -114,11 +116,11 @@ ltq_dma_close(struct ltq_dma_channel *ch
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{
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unsigned long flag;
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- local_irq_save(flag);
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+ spin_lock_irqsave(<q_dma_lock, flag);
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ltq_dma_w32(ch->nr, LTQ_DMA_CS);
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ltq_dma_w32_mask(DMA_CHAN_ON, 0, LTQ_DMA_CCTRL);
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- ltq_dma_disable_irq(ch);
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- local_irq_restore(flag);
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+ ltq_dma_w32_mask(1 << ch->nr, 0, LTQ_DMA_IRNEN);
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+ spin_unlock_irqrestore(<q_dma_lock, flag);
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}
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EXPORT_SYMBOL_GPL(ltq_dma_close);
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@@ -133,7 +135,7 @@ ltq_dma_alloc(struct ltq_dma_channel *ch
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&ch->phys, GFP_ATOMIC);
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memset(ch->desc_base, 0, LTQ_DESC_NUM * LTQ_DESC_SIZE);
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- local_irq_save(flags);
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+ spin_lock_irqsave(<q_dma_lock, flags);
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ltq_dma_w32(ch->nr, LTQ_DMA_CS);
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ltq_dma_w32(ch->phys, LTQ_DMA_CDBA);
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ltq_dma_w32(LTQ_DESC_NUM, LTQ_DMA_CDLEN);
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@@ -142,7 +144,7 @@ ltq_dma_alloc(struct ltq_dma_channel *ch
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ltq_dma_w32_mask(0, DMA_CHAN_RST, LTQ_DMA_CCTRL);
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while (ltq_dma_r32(LTQ_DMA_CCTRL) & DMA_CHAN_RST)
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;
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- local_irq_restore(flags);
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+ spin_unlock_irqrestore(<q_dma_lock, flags);
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}
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void
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@@ -152,11 +154,11 @@ ltq_dma_alloc_tx(struct ltq_dma_channel
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ltq_dma_alloc(ch);
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- local_irq_save(flags);
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+ spin_lock_irqsave(<q_dma_lock, flags);
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ltq_dma_w32(DMA_DESCPT, LTQ_DMA_CIE);
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ltq_dma_w32_mask(0, 1 << ch->nr, LTQ_DMA_IRNEN);
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ltq_dma_w32(DMA_WEIGHT | DMA_TX, LTQ_DMA_CCTRL);
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- local_irq_restore(flags);
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+ spin_unlock_irqrestore(<q_dma_lock, flags);
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}
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EXPORT_SYMBOL_GPL(ltq_dma_alloc_tx);
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@@ -167,11 +169,11 @@ ltq_dma_alloc_rx(struct ltq_dma_channel
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ltq_dma_alloc(ch);
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- local_irq_save(flags);
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+ spin_lock_irqsave(<q_dma_lock, flags);
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ltq_dma_w32(DMA_DESCPT, LTQ_DMA_CIE);
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ltq_dma_w32_mask(0, 1 << ch->nr, LTQ_DMA_IRNEN);
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ltq_dma_w32(DMA_WEIGHT, LTQ_DMA_CCTRL);
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- local_irq_restore(flags);
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+ spin_unlock_irqrestore(<q_dma_lock, flags);
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}
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EXPORT_SYMBOL_GPL(ltq_dma_alloc_rx);
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