b53: update header register difinitions

BCM531x5 has two pontential cpu ports, and header mode can be enabled
independently on both.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>

SVN-Revision: 48302
v19.07.3_mercusys_ac12_duma
Jonas Gorski 9 years ago
parent 1bd8400752
commit 2b3b4c95f1

@ -181,7 +181,8 @@
/* Broadcom Header control register (8 bit) */
#define B53_BRCM_HDR 0x03
#define BRCM_HDR_EN BIT(0) /* Enable tagging on IMP port */
#define BRCM_HDR_P8_EN BIT(0) /* Enable tagging on port 8 */
#define BRCM_HDR_P5_EN BIT(1) /* Enable tagging on port 5 */
/* Device ID register (8 or 32 bit) */
#define B53_DEVICE_ID 0x30

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