ar71xx: add support for TRENDnet TEW-823DRU
Add support for TRENDnet TEW-823DRU: - cpu: QCA9558 @720MHz - flash: 16MB - ram: 256MB - 4+1 RJ45 100/1000Mbps - wifi: QCA9558 (bgn) and QCA9880-BR4A (ac) - 1x USB 2.0 Signed-off-by: Cezary Jackiewicz <cezary.jackiewicz@gmail.com> SVN-Revision: 47927v19.07.3_mercusys_ac12_duma
John Crispin
9 years ago
parent
a418d03d6d
commit
1f71f2220d
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/*
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* TRENDnet TEW-823DRU board support
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*
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* Copyright (C) 2015 Cezary Jackiewicz <cezary.jackiewicz@gmail.com>
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* Copyright (C) 2014 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/ar8216_platform.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "pci.h"
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#include "dev-gpio-buttons.h"
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#include "dev-eth.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-usb.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#define TEW_823DRU_GPIO_LED_POWER_ORANGE 14
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#define TEW_823DRU_GPIO_LED_POWER_GREEN 19
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#define TEW_823DRU_GPIO_LED_PLANET_GREEN 22
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#define TEW_823DRU_GPIO_LED_PLANET_ORANGE 23
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#define TEW_823DRU_GPIO_BTN_WPS 16
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#define TEW_823DRU_GPIO_BTN_RESET 17
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#define TEW_823DRU_KEYS_POLL_INTERVAL 20 /* msecs */
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#define TEW_823DRU_KEYS_DEBOUNCE_INTERVAL \
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(3 * TEW_823DRU_KEYS_POLL_INTERVAL)
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#define TEW_823DRU_WMAC_CALDATA_OFFSET 0x1000
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#define TEW_823DRU_LAN_MAC_OFFSET 0x04
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#define TEW_823DRU_WAN_MAC_OFFSET 0x18
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static struct gpio_led tew_823dru_leds_gpio[] __initdata = {
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{
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.name = "trendnet:green:power",
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.gpio = TEW_823DRU_GPIO_LED_POWER_GREEN,
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.active_low = 1,
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},
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{
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.name = "trendnet:orange:power",
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.gpio = TEW_823DRU_GPIO_LED_POWER_ORANGE,
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.active_low = 1,
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},
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{
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.name = "trendnet:green:planet",
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.gpio = TEW_823DRU_GPIO_LED_PLANET_GREEN,
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.active_low = 1,
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},
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{
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.name = "trendnet:orange:planet",
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.gpio = TEW_823DRU_GPIO_LED_PLANET_ORANGE,
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.active_low = 1,
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},
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};
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static struct gpio_keys_button tew_823dru_gpio_keys[] __initdata = {
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{
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.desc = "Reset button",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = TEW_823DRU_KEYS_DEBOUNCE_INTERVAL,
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.gpio = TEW_823DRU_GPIO_BTN_RESET,
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.active_low = 1,
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},
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{
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.desc = "WPS button",
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.type = EV_KEY,
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.code = KEY_WPS_BUTTON,
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.debounce_interval = TEW_823DRU_KEYS_DEBOUNCE_INTERVAL,
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.gpio = TEW_823DRU_GPIO_BTN_WPS,
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.active_low = 1,
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},
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};
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/* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */
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static struct ar8327_pad_cfg tew_823dru_ar8327_pad0_cfg = {
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.mode = AR8327_PAD_MAC_SGMII,
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.sgmii_delay_en = true,
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};
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/* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */
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static struct ar8327_pad_cfg tew_823dru_ar8327_pad6_cfg = {
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.mode = AR8327_PAD_MAC_RGMII,
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.txclk_delay_en = true,
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.rxclk_delay_en = true,
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.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
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.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
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};
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static struct ar8327_platform_data tew_823dru_ar8327_data = {
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.pad0_cfg = &tew_823dru_ar8327_pad0_cfg,
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.pad6_cfg = &tew_823dru_ar8327_pad6_cfg,
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.port0_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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.port6_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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};
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static struct mdio_board_info tew_823dru_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = 0,
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.platform_data = &tew_823dru_ar8327_data,
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},
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};
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static void __init tew_823dru_setup(void)
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{
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u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000);
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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u8 lan_mac[ETH_ALEN];
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u8 wan_mac[ETH_ALEN];
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ath79_parse_ascii_mac(mac + TEW_823DRU_LAN_MAC_OFFSET, lan_mac);
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ath79_parse_ascii_mac(mac + TEW_823DRU_WAN_MAC_OFFSET, wan_mac);
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ath79_register_m25p80(NULL);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(tew_823dru_leds_gpio),
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tew_823dru_leds_gpio);
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ath79_register_gpio_keys_polled(-1, TEW_823DRU_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(tew_823dru_gpio_keys),
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tew_823dru_gpio_keys);
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ath79_register_wmac(art + TEW_823DRU_WMAC_CALDATA_OFFSET, lan_mac);
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ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0);
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ath79_init_mac(ath79_eth0_data.mac_addr, wan_mac, 0);
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mdiobus_register_board_info(tew_823dru_mdio0_info,
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ARRAY_SIZE(tew_823dru_mdio0_info));
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ath79_register_mdio(0, 0x0);
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ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
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/* GMAC0 is connected to the RMGII interface */
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = BIT(0);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_eth0_pll_data.pll_1000 = 0x56000000;
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ath79_register_eth(0);
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/* GMAC1 is connected to the SGMII interface */
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
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ath79_eth1_data.speed = SPEED_1000;
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ath79_eth1_data.duplex = DUPLEX_FULL;
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ath79_eth1_pll_data.pll_1000 = 0x03000101;
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ath79_register_eth(1);
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ath79_register_usb();
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ath79_register_pci();
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}
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MIPS_MACHINE(ATH79_MACH_TEW_823DRU, "TEW-823DRU", "TRENDnet TEW-823DRU",
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tew_823dru_setup);
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