ar71xx: use backported QCA955x patches
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 35878v19.07.3_mercusys_ac12_duma
Gabor Juhos
11 years ago
parent
64a9fe2894
commit
1d55249d7c
@ -0,0 +1,266 @@
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From 7377d32d37490f0804662c76a72b68d45d93966e Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Thu, 7 Feb 2013 19:32:23 +0000
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Subject: [PATCH] ath79: add ATH79_CPU_IRQ() macro
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commit 7e69c10a8ee1f201c040997c6742c27e915730ad upstream.
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Remove the individual ATH79_CPU_IRQ_* constants and
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use the new macro instead of those.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4929/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/ath79/dev-usb.c | 12 ++++++------
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arch/mips/ath79/dev-wmac.c | 8 ++++----
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arch/mips/ath79/irq.c | 32 ++++++++++++++++----------------
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arch/mips/ath79/pci.c | 6 +++---
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arch/mips/include/asm/mach-ath79/irq.h | 9 ++-------
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5 files changed, 31 insertions(+), 36 deletions(-)
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--- a/arch/mips/ath79/dev-usb.c
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+++ b/arch/mips/ath79/dev-usb.c
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@@ -111,7 +111,7 @@ static void __init ath79_usb_setup(void)
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platform_device_register(&ath79_ohci_device);
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ath79_usb_init_resource(ath79_ehci_resources, AR71XX_EHCI_BASE,
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- AR71XX_EHCI_SIZE, ATH79_CPU_IRQ_USB);
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+ AR71XX_EHCI_SIZE, ATH79_CPU_IRQ(3));
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ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v1;
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platform_device_register(&ath79_ehci_device);
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}
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@@ -136,7 +136,7 @@ static void __init ar7240_usb_setup(void
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iounmap(usb_ctrl_base);
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ath79_usb_init_resource(ath79_ohci_resources, AR7240_OHCI_BASE,
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- AR7240_OHCI_SIZE, ATH79_CPU_IRQ_USB);
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+ AR7240_OHCI_SIZE, ATH79_CPU_IRQ(3));
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platform_device_register(&ath79_ohci_device);
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}
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@@ -152,7 +152,7 @@ static void __init ar724x_usb_setup(void
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mdelay(10);
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ath79_usb_init_resource(ath79_ehci_resources, AR724X_EHCI_BASE,
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- AR724X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
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+ AR724X_EHCI_SIZE, ATH79_CPU_IRQ(3));
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ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
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platform_device_register(&ath79_ehci_device);
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}
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@@ -169,7 +169,7 @@ static void __init ar913x_usb_setup(void
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mdelay(10);
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ath79_usb_init_resource(ath79_ehci_resources, AR913X_EHCI_BASE,
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- AR913X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
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+ AR913X_EHCI_SIZE, ATH79_CPU_IRQ(3));
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ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
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platform_device_register(&ath79_ehci_device);
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}
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@@ -186,7 +186,7 @@ static void __init ar933x_usb_setup(void
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mdelay(10);
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ath79_usb_init_resource(ath79_ehci_resources, AR933X_EHCI_BASE,
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- AR933X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
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+ AR933X_EHCI_SIZE, ATH79_CPU_IRQ(3));
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ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
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platform_device_register(&ath79_ehci_device);
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}
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@@ -212,7 +212,7 @@ static void __init ar934x_usb_setup(void
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udelay(1000);
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ath79_usb_init_resource(ath79_ehci_resources, AR934X_EHCI_BASE,
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- AR934X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
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+ AR934X_EHCI_SIZE, ATH79_CPU_IRQ(3));
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ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
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platform_device_register(&ath79_ehci_device);
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}
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--- a/arch/mips/ath79/dev-wmac.c
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+++ b/arch/mips/ath79/dev-wmac.c
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@@ -55,8 +55,8 @@ static void __init ar913x_wmac_setup(voi
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ath79_wmac_resources[0].start = AR913X_WMAC_BASE;
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ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1;
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- ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
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- ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;
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+ ath79_wmac_resources[1].start = ATH79_CPU_IRQ(2);
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+ ath79_wmac_resources[1].end = ATH79_CPU_IRQ(2);
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}
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@@ -83,8 +83,8 @@ static void __init ar933x_wmac_setup(voi
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ath79_wmac_resources[0].start = AR933X_WMAC_BASE;
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ath79_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1;
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- ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
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- ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;
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+ ath79_wmac_resources[1].start = ATH79_CPU_IRQ(2);
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+ ath79_wmac_resources[1].end = ATH79_CPU_IRQ(2);
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t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
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if (t & AR933X_BOOTSTRAP_REF_CLK_40)
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--- a/arch/mips/ath79/irq.c
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+++ b/arch/mips/ath79/irq.c
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@@ -114,7 +114,7 @@ static void __init ath79_misc_irq_init(v
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handle_level_irq);
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}
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- irq_set_chained_handler(ATH79_CPU_IRQ_MISC, ath79_misc_irq_handler);
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+ irq_set_chained_handler(ATH79_CPU_IRQ(6), ath79_misc_irq_handler);
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}
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static void ar934x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc)
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@@ -147,7 +147,7 @@ static void ar934x_ip2_irq_init(void)
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irq_set_chip_and_handler(i, &dummy_irq_chip,
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handle_level_irq);
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- irq_set_chained_handler(ATH79_CPU_IRQ_IP2, ar934x_ip2_irq_dispatch);
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+ irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch);
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}
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asmlinkage void plat_irq_dispatch(void)
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@@ -157,22 +157,22 @@ asmlinkage void plat_irq_dispatch(void)
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pending = read_c0_status() & read_c0_cause() & ST0_IM;
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if (pending & STATUSF_IP7)
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- do_IRQ(ATH79_CPU_IRQ_TIMER);
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+ do_IRQ(ATH79_CPU_IRQ(7));
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else if (pending & STATUSF_IP2)
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ath79_ip2_handler();
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else if (pending & STATUSF_IP4)
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- do_IRQ(ATH79_CPU_IRQ_GE0);
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+ do_IRQ(ATH79_CPU_IRQ(4));
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else if (pending & STATUSF_IP5)
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- do_IRQ(ATH79_CPU_IRQ_GE1);
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+ do_IRQ(ATH79_CPU_IRQ(5));
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else if (pending & STATUSF_IP3)
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ath79_ip3_handler();
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else if (pending & STATUSF_IP6)
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- do_IRQ(ATH79_CPU_IRQ_MISC);
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+ do_IRQ(ATH79_CPU_IRQ(6));
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else
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spurious_interrupt();
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@@ -188,60 +188,60 @@ asmlinkage void plat_irq_dispatch(void)
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static void ar71xx_ip2_handler(void)
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{
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ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_PCI);
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- do_IRQ(ATH79_CPU_IRQ_IP2);
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+ do_IRQ(ATH79_CPU_IRQ(2));
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}
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static void ar724x_ip2_handler(void)
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{
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ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_PCIE);
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- do_IRQ(ATH79_CPU_IRQ_IP2);
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+ do_IRQ(ATH79_CPU_IRQ(2));
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}
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static void ar913x_ip2_handler(void)
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{
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ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_WMAC);
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- do_IRQ(ATH79_CPU_IRQ_IP2);
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+ do_IRQ(ATH79_CPU_IRQ(2));
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}
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static void ar933x_ip2_handler(void)
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{
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ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_WMAC);
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- do_IRQ(ATH79_CPU_IRQ_IP2);
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+ do_IRQ(ATH79_CPU_IRQ(2));
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}
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static void ar934x_ip2_handler(void)
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{
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- do_IRQ(ATH79_CPU_IRQ_IP2);
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+ do_IRQ(ATH79_CPU_IRQ(2));
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}
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static void ar71xx_ip3_handler(void)
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{
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ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_USB);
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- do_IRQ(ATH79_CPU_IRQ_USB);
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+ do_IRQ(ATH79_CPU_IRQ(3));
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}
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static void ar724x_ip3_handler(void)
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{
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ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_USB);
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- do_IRQ(ATH79_CPU_IRQ_USB);
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+ do_IRQ(ATH79_CPU_IRQ(3));
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}
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static void ar913x_ip3_handler(void)
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{
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ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_USB);
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- do_IRQ(ATH79_CPU_IRQ_USB);
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+ do_IRQ(ATH79_CPU_IRQ(3));
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}
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static void ar933x_ip3_handler(void)
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{
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ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_USB);
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- do_IRQ(ATH79_CPU_IRQ_USB);
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+ do_IRQ(ATH79_CPU_IRQ(3));
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}
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static void ar934x_ip3_handler(void)
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{
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ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_USB);
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- do_IRQ(ATH79_CPU_IRQ_USB);
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+ do_IRQ(ATH79_CPU_IRQ(3));
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}
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void __init arch_init_irq(void)
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--- a/arch/mips/ath79/pci.c
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+++ b/arch/mips/ath79/pci.c
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@@ -127,8 +127,8 @@ ath79_register_pci_ar71xx(void)
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res[0].end = AR71XX_PCI_CFG_BASE + AR71XX_PCI_CFG_SIZE - 1;
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res[1].flags = IORESOURCE_IRQ;
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- res[1].start = ATH79_CPU_IRQ_IP2;
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- res[1].end = ATH79_CPU_IRQ_IP2;
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+ res[1].start = ATH79_CPU_IRQ(2);
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+ res[1].end = ATH79_CPU_IRQ(2);
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res[2].name = "io_base";
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res[2].flags = IORESOURCE_IO;
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@@ -208,7 +208,7 @@ int __init ath79_register_pci(void)
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AR724X_PCI_MEM_BASE,
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AR724X_PCI_MEM_SIZE,
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0,
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- ATH79_CPU_IRQ_IP2);
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+ ATH79_CPU_IRQ(2));
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} else if (soc_is_ar9342() ||
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soc_is_ar9344()) {
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u32 bootstrap;
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--- a/arch/mips/include/asm/mach-ath79/irq.h
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+++ b/arch/mips/include/asm/mach-ath79/irq.h
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@@ -12,6 +12,8 @@
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#define MIPS_CPU_IRQ_BASE 0
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#define NR_IRQS 48
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+#define ATH79_CPU_IRQ(_x) (MIPS_CPU_IRQ_BASE + (_x))
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+
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#define ATH79_MISC_IRQ_BASE 8
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#define ATH79_MISC_IRQ_COUNT 32
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#define ATH79_MISC_IRQ(_x) (ATH79_MISC_IRQ_BASE + (_x))
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@@ -24,13 +26,6 @@
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#define ATH79_IP2_IRQ_COUNT 2
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#define ATH79_IP2_IRQ(_x) (ATH79_IP2_IRQ_BASE + (_x))
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-#define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2)
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-#define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3)
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-#define ATH79_CPU_IRQ_GE0 (MIPS_CPU_IRQ_BASE + 4)
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-#define ATH79_CPU_IRQ_GE1 (MIPS_CPU_IRQ_BASE + 5)
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-#define ATH79_CPU_IRQ_MISC (MIPS_CPU_IRQ_BASE + 6)
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-#define ATH79_CPU_IRQ_TIMER (MIPS_CPU_IRQ_BASE + 7)
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-
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#define ATH79_MISC_IRQ_TIMER (ATH79_MISC_IRQ_BASE + 0)
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#define ATH79_MISC_IRQ_ERROR (ATH79_MISC_IRQ_BASE + 1)
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#define ATH79_MISC_IRQ_GPIO (ATH79_MISC_IRQ_BASE + 2)
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@ -0,0 +1,85 @@
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From f4414336ae509d20c043264bc9f8f6bafb0e8a6f Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Thu, 7 Feb 2013 19:32:24 +0000
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Subject: [PATCH] ath79: remove ATH79_MISC_IRQ_* defines
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commit fd633cf1cfe978003888dc78ff94f926fbe7dd8a upstream.
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Use the ATH79_MISC_IRQ() macro instead.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4930/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/ath79/dev-common.c | 6 +++---
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arch/mips/ath79/dev-usb.c | 2 +-
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arch/mips/ath79/irq.c | 2 +-
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arch/mips/include/asm/mach-ath79/irq.h | 13 -------------
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4 files changed, 5 insertions(+), 18 deletions(-)
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--- a/arch/mips/ath79/dev-common.c
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+++ b/arch/mips/ath79/dev-common.c
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@@ -36,7 +36,7 @@ static struct resource ath79_uart_resour
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static struct plat_serial8250_port ath79_uart_data[] = {
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{
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.mapbase = AR71XX_UART_BASE,
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- .irq = ATH79_MISC_IRQ_UART,
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+ .irq = ATH79_MISC_IRQ(3),
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.flags = AR71XX_UART_FLAGS,
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.iotype = UPIO_MEM32,
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.regshift = 2,
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@@ -62,8 +62,8 @@ static struct resource ar933x_uart_resou
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.flags = IORESOURCE_MEM,
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},
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{
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- .start = ATH79_MISC_IRQ_UART,
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- .end = ATH79_MISC_IRQ_UART,
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+ .start = ATH79_MISC_IRQ(3),
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+ .end = ATH79_MISC_IRQ(3),
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.flags = IORESOURCE_IRQ,
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},
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};
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--- a/arch/mips/ath79/dev-usb.c
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+++ b/arch/mips/ath79/dev-usb.c
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@@ -107,7 +107,7 @@ static void __init ath79_usb_setup(void)
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mdelay(900);
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ath79_usb_init_resource(ath79_ohci_resources, AR71XX_OHCI_BASE,
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- AR71XX_OHCI_SIZE, ATH79_MISC_IRQ_OHCI);
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+ AR71XX_OHCI_SIZE, ATH79_MISC_IRQ(6));
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platform_device_register(&ath79_ohci_device);
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ath79_usb_init_resource(ath79_ehci_resources, AR71XX_EHCI_BASE,
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--- a/arch/mips/ath79/irq.c
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+++ b/arch/mips/ath79/irq.c
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@@ -265,7 +265,7 @@ void __init arch_init_irq(void)
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BUG();
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}
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- cp0_perfcount_irq = ATH79_MISC_IRQ_PERFC;
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+ cp0_perfcount_irq = ATH79_MISC_IRQ(5);
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mips_cpu_irq_init();
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ath79_misc_irq_init();
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--- a/arch/mips/include/asm/mach-ath79/irq.h
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+++ b/arch/mips/include/asm/mach-ath79/irq.h
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@@ -26,19 +26,6 @@
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#define ATH79_IP2_IRQ_COUNT 2
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#define ATH79_IP2_IRQ(_x) (ATH79_IP2_IRQ_BASE + (_x))
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-#define ATH79_MISC_IRQ_TIMER (ATH79_MISC_IRQ_BASE + 0)
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-#define ATH79_MISC_IRQ_ERROR (ATH79_MISC_IRQ_BASE + 1)
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-#define ATH79_MISC_IRQ_GPIO (ATH79_MISC_IRQ_BASE + 2)
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-#define ATH79_MISC_IRQ_UART (ATH79_MISC_IRQ_BASE + 3)
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-#define ATH79_MISC_IRQ_WDOG (ATH79_MISC_IRQ_BASE + 4)
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-#define ATH79_MISC_IRQ_PERFC (ATH79_MISC_IRQ_BASE + 5)
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-#define ATH79_MISC_IRQ_OHCI (ATH79_MISC_IRQ_BASE + 6)
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-#define ATH79_MISC_IRQ_DMA (ATH79_MISC_IRQ_BASE + 7)
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-#define ATH79_MISC_IRQ_TIMER2 (ATH79_MISC_IRQ_BASE + 8)
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-#define ATH79_MISC_IRQ_TIMER3 (ATH79_MISC_IRQ_BASE + 9)
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-#define ATH79_MISC_IRQ_TIMER4 (ATH79_MISC_IRQ_BASE + 10)
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-#define ATH79_MISC_IRQ_ETHSW (ATH79_MISC_IRQ_BASE + 12)
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-
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#include_next <irq.h>
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#endif /* __ASM_MACH_ATH79_IRQ_H */
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@ -0,0 +1,205 @@
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From 9c3c3f7be27c88b59359e743be0437eb6f9af41f Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Sat, 9 Feb 2013 17:57:52 +0000
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Subject: [PATCH] MIPS: ath79: use dynamically allocated USB platform devices
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commit 90a938d1add4859ad3e43c3dd5ee54bd0627e42d upstream.
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The current code uses static resources and static platform
|
||||
device instances for the possible USB controllers in the
|
||||
system. These static variables contains initial values which
|
||||
leads to data segment pollution.
|
||||
|
||||
Remove the static variables and use dynamically allocated
|
||||
structures instead.
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Patchwork: http://patchwork.linux-mips.org/patch/4933/
|
||||
Signed-off-by: John Crispin <blogic@openwrt.org>
|
||||
---
|
||||
arch/mips/ath79/dev-usb.c | 111 +++++++++++++++++++++------------------------
|
||||
1 file changed, 51 insertions(+), 60 deletions(-)
|
||||
|
||||
--- a/arch/mips/ath79/dev-usb.c
|
||||
+++ b/arch/mips/ath79/dev-usb.c
|
||||
@@ -25,29 +25,11 @@
|
||||
#include "common.h"
|
||||
#include "dev-usb.h"
|
||||
|
||||
-static struct resource ath79_ohci_resources[2];
|
||||
-
|
||||
-static u64 ath79_ohci_dmamask = DMA_BIT_MASK(32);
|
||||
+static u64 ath79_usb_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct usb_ohci_pdata ath79_ohci_pdata = {
|
||||
};
|
||||
|
||||
-static struct platform_device ath79_ohci_device = {
|
||||
- .name = "ohci-platform",
|
||||
- .id = -1,
|
||||
- .resource = ath79_ohci_resources,
|
||||
- .num_resources = ARRAY_SIZE(ath79_ohci_resources),
|
||||
- .dev = {
|
||||
- .dma_mask = &ath79_ohci_dmamask,
|
||||
- .coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
- .platform_data = &ath79_ohci_pdata,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
-static struct resource ath79_ehci_resources[2];
|
||||
-
|
||||
-static u64 ath79_ehci_dmamask = DMA_BIT_MASK(32);
|
||||
-
|
||||
static struct usb_ehci_pdata ath79_ehci_pdata_v1 = {
|
||||
.has_synopsys_hc_bug = 1,
|
||||
};
|
||||
@@ -57,22 +39,16 @@ static struct usb_ehci_pdata ath79_ehci_
|
||||
.has_tt = 1,
|
||||
};
|
||||
|
||||
-static struct platform_device ath79_ehci_device = {
|
||||
- .name = "ehci-platform",
|
||||
- .id = -1,
|
||||
- .resource = ath79_ehci_resources,
|
||||
- .num_resources = ARRAY_SIZE(ath79_ehci_resources),
|
||||
- .dev = {
|
||||
- .dma_mask = &ath79_ehci_dmamask,
|
||||
- .coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
- },
|
||||
-};
|
||||
-
|
||||
-static void __init ath79_usb_init_resource(struct resource res[2],
|
||||
- unsigned long base,
|
||||
- unsigned long size,
|
||||
- int irq)
|
||||
+static void __init ath79_usb_register(const char *name, int id,
|
||||
+ unsigned long base, unsigned long size,
|
||||
+ int irq, const void *data,
|
||||
+ size_t data_size)
|
||||
{
|
||||
+ struct resource res[2];
|
||||
+ struct platform_device *pdev;
|
||||
+
|
||||
+ memset(res, 0, sizeof(res));
|
||||
+
|
||||
res[0].flags = IORESOURCE_MEM;
|
||||
res[0].start = base;
|
||||
res[0].end = base + size - 1;
|
||||
@@ -80,6 +56,19 @@ static void __init ath79_usb_init_resour
|
||||
res[1].flags = IORESOURCE_IRQ;
|
||||
res[1].start = irq;
|
||||
res[1].end = irq;
|
||||
+
|
||||
+ pdev = platform_device_register_resndata(NULL, name, id,
|
||||
+ res, ARRAY_SIZE(res),
|
||||
+ data, data_size);
|
||||
+
|
||||
+ if (IS_ERR(pdev)) {
|
||||
+ pr_err("ath79: unable to register USB at %08lx, err=%d\n",
|
||||
+ base, (int) PTR_ERR(pdev));
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ pdev->dev.dma_mask = &ath79_usb_dmamask;
|
||||
+ pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
|
||||
}
|
||||
|
||||
#define AR71XX_USB_RESET_MASK (AR71XX_RESET_USB_HOST | \
|
||||
@@ -106,14 +95,15 @@ static void __init ath79_usb_setup(void)
|
||||
|
||||
mdelay(900);
|
||||
|
||||
- ath79_usb_init_resource(ath79_ohci_resources, AR71XX_OHCI_BASE,
|
||||
- AR71XX_OHCI_SIZE, ATH79_MISC_IRQ(6));
|
||||
- platform_device_register(&ath79_ohci_device);
|
||||
-
|
||||
- ath79_usb_init_resource(ath79_ehci_resources, AR71XX_EHCI_BASE,
|
||||
- AR71XX_EHCI_SIZE, ATH79_CPU_IRQ(3));
|
||||
- ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v1;
|
||||
- platform_device_register(&ath79_ehci_device);
|
||||
+ ath79_usb_register("ohci-platform", -1,
|
||||
+ AR71XX_OHCI_BASE, AR71XX_OHCI_SIZE,
|
||||
+ ATH79_MISC_IRQ(6),
|
||||
+ &ath79_ohci_pdata, sizeof(ath79_ohci_pdata));
|
||||
+
|
||||
+ ath79_usb_register("ehci-platform", -1,
|
||||
+ AR71XX_EHCI_BASE, AR71XX_EHCI_SIZE,
|
||||
+ ATH79_CPU_IRQ(3),
|
||||
+ &ath79_ehci_pdata_v1, sizeof(ath79_ehci_pdata_v1));
|
||||
}
|
||||
|
||||
static void __init ar7240_usb_setup(void)
|
||||
@@ -135,9 +125,10 @@ static void __init ar7240_usb_setup(void
|
||||
|
||||
iounmap(usb_ctrl_base);
|
||||
|
||||
- ath79_usb_init_resource(ath79_ohci_resources, AR7240_OHCI_BASE,
|
||||
- AR7240_OHCI_SIZE, ATH79_CPU_IRQ(3));
|
||||
- platform_device_register(&ath79_ohci_device);
|
||||
+ ath79_usb_register("ohci-platform", -1,
|
||||
+ AR7240_OHCI_BASE, AR7240_OHCI_SIZE,
|
||||
+ ATH79_CPU_IRQ(3),
|
||||
+ &ath79_ohci_pdata, sizeof(ath79_ohci_pdata));
|
||||
}
|
||||
|
||||
static void __init ar724x_usb_setup(void)
|
||||
@@ -151,10 +142,10 @@ static void __init ar724x_usb_setup(void
|
||||
ath79_device_reset_clear(AR724X_RESET_USB_PHY);
|
||||
mdelay(10);
|
||||
|
||||
- ath79_usb_init_resource(ath79_ehci_resources, AR724X_EHCI_BASE,
|
||||
- AR724X_EHCI_SIZE, ATH79_CPU_IRQ(3));
|
||||
- ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
|
||||
- platform_device_register(&ath79_ehci_device);
|
||||
+ ath79_usb_register("ehci-platform", -1,
|
||||
+ AR724X_EHCI_BASE, AR724X_EHCI_SIZE,
|
||||
+ ATH79_CPU_IRQ(3),
|
||||
+ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
|
||||
}
|
||||
|
||||
static void __init ar913x_usb_setup(void)
|
||||
@@ -168,10 +159,10 @@ static void __init ar913x_usb_setup(void
|
||||
ath79_device_reset_clear(AR913X_RESET_USB_PHY);
|
||||
mdelay(10);
|
||||
|
||||
- ath79_usb_init_resource(ath79_ehci_resources, AR913X_EHCI_BASE,
|
||||
- AR913X_EHCI_SIZE, ATH79_CPU_IRQ(3));
|
||||
- ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
|
||||
- platform_device_register(&ath79_ehci_device);
|
||||
+ ath79_usb_register("ehci-platform", -1,
|
||||
+ AR913X_EHCI_BASE, AR913X_EHCI_SIZE,
|
||||
+ ATH79_CPU_IRQ(3),
|
||||
+ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
|
||||
}
|
||||
|
||||
static void __init ar933x_usb_setup(void)
|
||||
@@ -185,10 +176,10 @@ static void __init ar933x_usb_setup(void
|
||||
ath79_device_reset_clear(AR933X_RESET_USB_PHY);
|
||||
mdelay(10);
|
||||
|
||||
- ath79_usb_init_resource(ath79_ehci_resources, AR933X_EHCI_BASE,
|
||||
- AR933X_EHCI_SIZE, ATH79_CPU_IRQ(3));
|
||||
- ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
|
||||
- platform_device_register(&ath79_ehci_device);
|
||||
+ ath79_usb_register("ehci-platform", -1,
|
||||
+ AR933X_EHCI_BASE, AR933X_EHCI_SIZE,
|
||||
+ ATH79_CPU_IRQ(3),
|
||||
+ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
|
||||
}
|
||||
|
||||
static void __init ar934x_usb_setup(void)
|
||||
@@ -211,10 +202,10 @@ static void __init ar934x_usb_setup(void
|
||||
ath79_device_reset_clear(AR934X_RESET_USB_HOST);
|
||||
udelay(1000);
|
||||
|
||||
- ath79_usb_init_resource(ath79_ehci_resources, AR934X_EHCI_BASE,
|
||||
- AR934X_EHCI_SIZE, ATH79_CPU_IRQ(3));
|
||||
- ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
|
||||
- platform_device_register(&ath79_ehci_device);
|
||||
+ ath79_usb_register("ehci-platform", -1,
|
||||
+ AR934X_EHCI_BASE, AR934X_EHCI_SIZE,
|
||||
+ ATH79_CPU_IRQ(3),
|
||||
+ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
|
||||
}
|
||||
|
||||
void __init ath79_register_usb(void)
|
||||
@ -0,0 +1,29 @@
|
||||
From acb28a2a03a93e351e26230511a9f38d0da62fdd Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Fri, 15 Feb 2013 18:51:57 +0000
|
||||
Subject: [PATCH] MIPS: ath79: fix WMAC IRQ resource assignment
|
||||
|
||||
commit e3b25cead4b58fbf60270ba73a1669bf9e5635f5 upstream.
|
||||
|
||||
The '.start' field of the IRQ resource assigned twice
|
||||
in ar934x_wmac_setup(). The second assignment must
|
||||
set the '.end' field. Fix it.
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Patchwork: http://patchwork.linux-mips.org/patch/4954/
|
||||
Signed-off-by: John Crispin <blogic@openwrt.org>
|
||||
---
|
||||
arch/mips/ath79/dev-wmac.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
--- a/arch/mips/ath79/dev-wmac.c
|
||||
+++ b/arch/mips/ath79/dev-wmac.c
|
||||
@@ -107,7 +107,7 @@ static void ar934x_wmac_setup(void)
|
||||
ath79_wmac_resources[0].start = AR934X_WMAC_BASE;
|
||||
ath79_wmac_resources[0].end = AR934X_WMAC_BASE + AR934X_WMAC_SIZE - 1;
|
||||
ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
|
||||
- ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
|
||||
+ ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1);
|
||||
|
||||
t = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
|
||||
if (t & AR934X_BOOTSTRAP_REF_CLK_40)
|
||||
@ -0,0 +1,43 @@
|
||||
From 8a4de56e3b7a6fbb777c78f87142bafc22c32ac2 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Fri, 15 Feb 2013 13:38:15 +0000
|
||||
Subject: [PATCH] MIPS: ath79: add early printk support for the QCA955X SoCs
|
||||
|
||||
commit 908987797076b848f01b32c21d61d0e152efc236 upstream.
|
||||
|
||||
The patch allows to see kernel messages on the
|
||||
QCA955X SoCs in early boot stage.
|
||||
|
||||
Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
|
||||
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
|
||||
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Patchwork: http://patchwork.linux-mips.org/patch/4944/
|
||||
Signed-off-by: John Crispin <blogic@openwrt.org>
|
||||
---
|
||||
arch/mips/ath79/early_printk.c | 2 ++
|
||||
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 ++
|
||||
2 files changed, 4 insertions(+)
|
||||
|
||||
--- a/arch/mips/ath79/early_printk.c
|
||||
+++ b/arch/mips/ath79/early_printk.c
|
||||
@@ -74,6 +74,8 @@ static void prom_putchar_init(void)
|
||||
case REV_ID_MAJOR_AR9341:
|
||||
case REV_ID_MAJOR_AR9342:
|
||||
case REV_ID_MAJOR_AR9344:
|
||||
+ case REV_ID_MAJOR_QCA9556:
|
||||
+ case REV_ID_MAJOR_QCA9558:
|
||||
_prom_putchar = prom_putchar_ar71xx;
|
||||
break;
|
||||
|
||||
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
||||
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
||||
@@ -370,6 +370,8 @@
|
||||
#define REV_ID_MAJOR_AR9341 0x0120
|
||||
#define REV_ID_MAJOR_AR9342 0x1120
|
||||
#define REV_ID_MAJOR_AR9344 0x2120
|
||||
+#define REV_ID_MAJOR_QCA9556 0x0130
|
||||
+#define REV_ID_MAJOR_QCA9558 0x1130
|
||||
|
||||
#define AR71XX_REV_ID_MINOR_MASK 0x3
|
||||
#define AR71XX_REV_ID_MINOR_AR7130 0x0
|
||||
@ -1,13 +1,23 @@
|
||||
From f465a16766a015a31d4e83af1ad62cc718d64f5a Mon Sep 17 00:00:00 2001
|
||||
From 64d8592fd1f7265de8b31dbf294928eaf9983db5 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Sun, 24 Jun 2012 13:43:08 +0200
|
||||
Subject: [PATCH 18/34] MIPS: ath79: add clock setup for the QCA955X SoCs
|
||||
Date: Fri, 15 Feb 2013 13:38:17 +0000
|
||||
Subject: [PATCH] MIPS: ath79: add clock setup code for the QCA955X SoCs
|
||||
|
||||
commit 41583c05c15cd3adb848f9ee8316bf8084c961cb upstream.
|
||||
|
||||
The patch adds code to get various clock frequencies
|
||||
from the PLLs used in the QCA955x SoCs.
|
||||
|
||||
Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
|
||||
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
|
||||
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Patchwork: http://patchwork.linux-mips.org/patch/4945/
|
||||
Signed-off-by: John Crispin <blogic@openwrt.org>
|
||||
---
|
||||
arch/mips/ath79/clock.c | 78 ++++++++++++++++++++++++
|
||||
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 39 ++++++++++++
|
||||
2 files changed, 117 insertions(+), 0 deletions(-)
|
||||
2 files changed, 117 insertions(+)
|
||||
|
||||
--- a/arch/mips/ath79/clock.c
|
||||
+++ b/arch/mips/ath79/clock.c
|
||||
@ -0,0 +1,53 @@
|
||||
From d3cc7a15c1e1a04e8d561c0b05d176434142bf9a Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Fri, 15 Feb 2013 13:38:20 +0000
|
||||
Subject: [PATCH] MIPS: ath79: add QCA955X specific glue to
|
||||
ath79_device_reset_{set, clear}
|
||||
|
||||
commit 7d4c2af9bdbbe789fe4a93f32c5890d72cbf60a1 upstream.
|
||||
|
||||
The ath79_device_reset_* are causing BUG when
|
||||
those are used on the QCA955x SoCs. The patch
|
||||
adds the required code to avoid that.
|
||||
|
||||
Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
|
||||
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
|
||||
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Patchwork: http://patchwork.linux-mips.org/patch/4948/
|
||||
Signed-off-by: John Crispin <blogic@openwrt.org>
|
||||
---
|
||||
arch/mips/ath79/common.c | 4 ++++
|
||||
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
|
||||
2 files changed, 5 insertions(+)
|
||||
|
||||
--- a/arch/mips/ath79/common.c
|
||||
+++ b/arch/mips/ath79/common.c
|
||||
@@ -72,6 +72,8 @@ void ath79_device_reset_set(u32 mask)
|
||||
reg = AR933X_RESET_REG_RESET_MODULE;
|
||||
else if (soc_is_ar934x())
|
||||
reg = AR934X_RESET_REG_RESET_MODULE;
|
||||
+ else if (soc_is_qca955x())
|
||||
+ reg = QCA955X_RESET_REG_RESET_MODULE;
|
||||
else
|
||||
BUG();
|
||||
|
||||
@@ -98,6 +100,8 @@ void ath79_device_reset_clear(u32 mask)
|
||||
reg = AR933X_RESET_REG_RESET_MODULE;
|
||||
else if (soc_is_ar934x())
|
||||
reg = AR934X_RESET_REG_RESET_MODULE;
|
||||
+ else if (soc_is_qca955x())
|
||||
+ reg = QCA955X_RESET_REG_RESET_MODULE;
|
||||
else
|
||||
BUG();
|
||||
|
||||
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
||||
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
||||
@@ -299,6 +299,7 @@
|
||||
#define AR934X_RESET_REG_BOOTSTRAP 0xb0
|
||||
#define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac
|
||||
|
||||
+#define QCA955X_RESET_REG_RESET_MODULE 0x1c
|
||||
#define QCA955X_RESET_REG_BOOTSTRAP 0xb0
|
||||
#define QCA955X_RESET_REG_EXT_INT_STATUS 0xac
|
||||
|
||||
@ -0,0 +1,34 @@
|
||||
From 25320dbceda508afc5b2de1986072caa9e04ad1b Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Fri, 15 Feb 2013 13:38:21 +0000
|
||||
Subject: [PATCH] MIPS: ath79: register UART for the QCA955X SoCs
|
||||
|
||||
commit 13992303fa705ae1e4acf4660c69687672996029 upstream.
|
||||
|
||||
Similarly to the preceding SoCs, the QCA955X SoCs
|
||||
also have a built-in NS16650 compatible UART.
|
||||
Register the platform device for that to make
|
||||
it usable.
|
||||
|
||||
Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
|
||||
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
|
||||
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Patchwork: http://patchwork.linux-mips.org/patch/4949/
|
||||
Signed-off-by: John Crispin <blogic@openwrt.org>
|
||||
---
|
||||
arch/mips/ath79/dev-common.c | 3 ++-
|
||||
1 file changed, 2 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/arch/mips/ath79/dev-common.c
|
||||
+++ b/arch/mips/ath79/dev-common.c
|
||||
@@ -90,7 +90,8 @@ void __init ath79_register_uart(void)
|
||||
if (soc_is_ar71xx() ||
|
||||
soc_is_ar724x() ||
|
||||
soc_is_ar913x() ||
|
||||
- soc_is_ar934x()) {
|
||||
+ soc_is_ar934x() ||
|
||||
+ soc_is_qca955x()) {
|
||||
ath79_uart_data[0].uartclk = clk_get_rate(clk);
|
||||
platform_device_register(&ath79_uart_device);
|
||||
} else if (soc_is_ar933x()) {
|
||||
@ -0,0 +1,65 @@
|
||||
From 281db30007b5836ce8acf5a45160fde6b176eda4 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Fri, 15 Feb 2013 13:38:24 +0000
|
||||
Subject: [PATCH] MIPS: ath79: add USB controller registration code for the
|
||||
QCA955X SoCs
|
||||
|
||||
commit 82c46840ae6bd8a147c59cd51f636d913989324a upstream.
|
||||
|
||||
Register platfom devices for the built-in USB
|
||||
controllers of the SoCs.
|
||||
|
||||
Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
|
||||
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
|
||||
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Patchwork: http://patchwork.linux-mips.org/patch/4952/
|
||||
Signed-off-by: John Crispin <blogic@openwrt.org>
|
||||
---
|
||||
arch/mips/ath79/dev-usb.c | 15 +++++++++++++++
|
||||
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 3 +++
|
||||
2 files changed, 18 insertions(+)
|
||||
|
||||
--- a/arch/mips/ath79/dev-usb.c
|
||||
+++ b/arch/mips/ath79/dev-usb.c
|
||||
@@ -208,6 +208,19 @@ static void __init ar934x_usb_setup(void
|
||||
&ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
|
||||
}
|
||||
|
||||
+static void __init qca955x_usb_setup(void)
|
||||
+{
|
||||
+ ath79_usb_register("ehci-platform", 0,
|
||||
+ QCA955X_EHCI0_BASE, QCA955X_EHCI_SIZE,
|
||||
+ ATH79_IP3_IRQ(0),
|
||||
+ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
|
||||
+
|
||||
+ ath79_usb_register("ehci-platform", 1,
|
||||
+ QCA955X_EHCI1_BASE, QCA955X_EHCI_SIZE,
|
||||
+ ATH79_IP3_IRQ(1),
|
||||
+ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
|
||||
+}
|
||||
+
|
||||
void __init ath79_register_usb(void)
|
||||
{
|
||||
if (soc_is_ar71xx())
|
||||
@@ -222,6 +235,8 @@ void __init ath79_register_usb(void)
|
||||
ar933x_usb_setup();
|
||||
else if (soc_is_ar934x())
|
||||
ar934x_usb_setup();
|
||||
+ else if (soc_is_qca955x())
|
||||
+ qca955x_usb_setup();
|
||||
else
|
||||
BUG();
|
||||
}
|
||||
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
||||
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
||||
@@ -109,6 +109,9 @@
|
||||
|
||||
#define QCA955X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
|
||||
#define QCA955X_WMAC_SIZE 0x20000
|
||||
+#define QCA955X_EHCI0_BASE 0x1b000000
|
||||
+#define QCA955X_EHCI1_BASE 0x1b400000
|
||||
+#define QCA955X_EHCI_SIZE 0x1000
|
||||
|
||||
/*
|
||||
* DDR_CTRL block
|
||||
@ -1,31 +0,0 @@
|
||||
From 114df1e368b8503de1fe63e97d6eea521eecfbe4 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Sun, 24 Jun 2012 13:40:38 +0200
|
||||
Subject: [PATCH 16/34] MIPS: ath79: add early printk support for the QCA955X SoCs
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
---
|
||||
arch/mips/ath79/early_printk.c | 1 +
|
||||
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
|
||||
2 files changed, 2 insertions(+), 0 deletions(-)
|
||||
|
||||
--- a/arch/mips/ath79/early_printk.c
|
||||
+++ b/arch/mips/ath79/early_printk.c
|
||||
@@ -74,6 +74,7 @@ static void prom_putchar_init(void)
|
||||
case REV_ID_MAJOR_AR9341:
|
||||
case REV_ID_MAJOR_AR9342:
|
||||
case REV_ID_MAJOR_AR9344:
|
||||
+ case REV_ID_MAJOR_QCA9558:
|
||||
_prom_putchar = prom_putchar_ar71xx;
|
||||
break;
|
||||
|
||||
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
||||
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
||||
@@ -370,6 +370,7 @@
|
||||
#define REV_ID_MAJOR_AR9341 0x0120
|
||||
#define REV_ID_MAJOR_AR9342 0x1120
|
||||
#define REV_ID_MAJOR_AR9344 0x2120
|
||||
+#define REV_ID_MAJOR_QCA9558 0x1130
|
||||
|
||||
#define AR71XX_REV_ID_MINOR_MASK 0x3
|
||||
#define AR71XX_REV_ID_MINOR_AR7130 0x0
|
||||
@ -1,31 +0,0 @@
|
||||
From 68368e80b4db83afe39664a7d43c8b5c7b8ac3b4 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Sun, 24 Jun 2012 13:49:33 +0200
|
||||
Subject: [PATCH 21/34] MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set,clear}
|
||||
|
||||
---
|
||||
arch/mips/ath79/common.c | 6 ++++--
|
||||
1 files changed, 4 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/arch/mips/ath79/common.c
|
||||
+++ b/arch/mips/ath79/common.c
|
||||
@@ -70,7 +70,8 @@ void ath79_device_reset_set(u32 mask)
|
||||
reg = AR913X_RESET_REG_RESET_MODULE;
|
||||
else if (soc_is_ar933x())
|
||||
reg = AR933X_RESET_REG_RESET_MODULE;
|
||||
- else if (soc_is_ar934x())
|
||||
+ else if (soc_is_ar934x() ||
|
||||
+ soc_is_qca955x())
|
||||
reg = AR934X_RESET_REG_RESET_MODULE;
|
||||
else
|
||||
BUG();
|
||||
@@ -96,7 +97,8 @@ void ath79_device_reset_clear(u32 mask)
|
||||
reg = AR913X_RESET_REG_RESET_MODULE;
|
||||
else if (soc_is_ar933x())
|
||||
reg = AR933X_RESET_REG_RESET_MODULE;
|
||||
- else if (soc_is_ar934x())
|
||||
+ else if (soc_is_ar934x() ||
|
||||
+ soc_is_qca955x())
|
||||
reg = AR934X_RESET_REG_RESET_MODULE;
|
||||
else
|
||||
BUG();
|
||||
@ -1,22 +0,0 @@
|
||||
From f7d7b362b51c51c1ae80bb7ade2039d6f74d4070 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Sun, 24 Jun 2012 13:46:26 +0200
|
||||
Subject: [PATCH 22/34] MIPS: ath79: register UART for the QCA955X SoCs
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
---
|
||||
arch/mips/ath79/dev-common.c | 3 ++-
|
||||
1 files changed, 2 insertions(+), 1 deletions(-)
|
||||
|
||||
--- a/arch/mips/ath79/dev-common.c
|
||||
+++ b/arch/mips/ath79/dev-common.c
|
||||
@@ -90,7 +90,8 @@ void __init ath79_register_uart(void)
|
||||
if (soc_is_ar71xx() ||
|
||||
soc_is_ar724x() ||
|
||||
soc_is_ar913x() ||
|
||||
- soc_is_ar934x()) {
|
||||
+ soc_is_ar934x() ||
|
||||
+ soc_is_qca955x()) {
|
||||
ath79_uart_data[0].uartclk = clk_get_rate(clk);
|
||||
platform_device_register(&ath79_uart_device);
|
||||
} else if (soc_is_ar933x()) {
|
||||
@ -1,93 +0,0 @@
|
||||
From e4ba5e2bffd1f373f57dd692233aa6b7b46ae76c Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Sun, 24 Jun 2012 13:47:35 +0200
|
||||
Subject: [PATCH 23/34] MIPS: ath79: add USB controller registration code for the QCA955X SoCs
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
---
|
||||
arch/mips/ath79/dev-usb.c | 46 ++++++++++++++++++++++++
|
||||
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 4 ++
|
||||
2 files changed, 50 insertions(+), 0 deletions(-)
|
||||
|
||||
--- a/arch/mips/ath79/dev-usb.c
|
||||
+++ b/arch/mips/ath79/dev-usb.c
|
||||
@@ -73,6 +73,8 @@ static void __init ath79_usb_init_resour
|
||||
unsigned long size,
|
||||
int irq)
|
||||
{
|
||||
+ memset(res, 0, sizeof(res));
|
||||
+
|
||||
res[0].flags = IORESOURCE_MEM;
|
||||
res[0].start = base;
|
||||
res[0].end = base + size - 1;
|
||||
@@ -217,6 +219,48 @@ static void __init ar934x_usb_setup(void
|
||||
platform_device_register(&ath79_ehci_device);
|
||||
}
|
||||
|
||||
+static void __init qca955x_usb_setup(void)
|
||||
+{
|
||||
+ struct platform_device *pdev;
|
||||
+
|
||||
+ ath79_usb_init_resource(ath79_ehci_resources,
|
||||
+ QCA955X_EHCI0_BASE, QCA955X_EHCI_SIZE,
|
||||
+ ATH79_IP3_IRQ(0));
|
||||
+
|
||||
+ pdev = platform_device_register_resndata(NULL, "ehci-platform", 0,
|
||||
+ ath79_ehci_resources,
|
||||
+ ARRAY_SIZE(ath79_ehci_resources),
|
||||
+ &ath79_ehci_pdata_v2,
|
||||
+ sizeof(ath79_ehci_pdata_v2));
|
||||
+ if (IS_ERR(pdev)) {
|
||||
+ pr_err("Unable to register USB %d device, err=%d\n", 0,
|
||||
+ (int) PTR_ERR(pdev));
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ pdev->dev.dma_mask = &ath79_ehci_dmamask;
|
||||
+ pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
|
||||
+
|
||||
+ ath79_usb_init_resource(ath79_ehci_resources,
|
||||
+ QCA955X_EHCI1_BASE, QCA955X_EHCI_SIZE,
|
||||
+ ATH79_IP3_IRQ(1));
|
||||
+
|
||||
+ pdev = platform_device_register_resndata(NULL, "ehci-platform", 1,
|
||||
+ ath79_ehci_resources,
|
||||
+ ARRAY_SIZE(ath79_ehci_resources),
|
||||
+ &ath79_ehci_pdata_v2,
|
||||
+ sizeof(ath79_ehci_pdata_v2));
|
||||
+
|
||||
+ if (IS_ERR(pdev)) {
|
||||
+ pr_err("Unable to register USB %d device, err=%d\n", 1,
|
||||
+ (int) PTR_ERR(pdev));
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ pdev->dev.dma_mask = &ath79_ehci_dmamask;
|
||||
+ pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
|
||||
+}
|
||||
+
|
||||
void __init ath79_register_usb(void)
|
||||
{
|
||||
if (soc_is_ar71xx())
|
||||
@@ -231,6 +275,8 @@ void __init ath79_register_usb(void)
|
||||
ar933x_usb_setup();
|
||||
else if (soc_is_ar934x())
|
||||
ar934x_usb_setup();
|
||||
+ else if (soc_is_qca955x())
|
||||
+ qca955x_usb_setup();
|
||||
else
|
||||
BUG();
|
||||
}
|
||||
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
||||
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
||||
@@ -94,6 +94,10 @@
|
||||
#define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000)
|
||||
#define AR934X_SRIF_SIZE 0x1000
|
||||
|
||||
+#define QCA955X_EHCI0_BASE 0x1b000000
|
||||
+#define QCA955X_EHCI1_BASE 0x1b400000
|
||||
+#define QCA955X_EHCI_SIZE 0x200
|
||||
+
|
||||
/*
|
||||
* DDR_CTRL block
|
||||
*/
|
||||
@ -1,56 +0,0 @@
|
||||
--- a/arch/mips/ath79/setup.c
|
||||
+++ b/arch/mips/ath79/setup.c
|
||||
@@ -164,6 +164,12 @@ static void __init ath79_detect_sys_type
|
||||
rev = id & AR934X_REV_ID_REVISION_MASK;
|
||||
break;
|
||||
|
||||
+ case REV_ID_MAJOR_QCA9556:
|
||||
+ ath79_soc = ATH79_SOC_QCA9556;
|
||||
+ chip = "9556";
|
||||
+ rev = id & AR944X_REV_ID_REVISION_MASK;
|
||||
+ break;
|
||||
+
|
||||
case REV_ID_MAJOR_QCA9558:
|
||||
ath79_soc = ATH79_SOC_QCA9558;
|
||||
chip = "9558";
|
||||
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
||||
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
||||
@@ -460,6 +460,7 @@
|
||||
#define REV_ID_MAJOR_AR9341 0x0120
|
||||
#define REV_ID_MAJOR_AR9342 0x1120
|
||||
#define REV_ID_MAJOR_AR9344 0x2120
|
||||
+#define REV_ID_MAJOR_QCA9556 0x0130
|
||||
#define REV_ID_MAJOR_QCA9558 0x1130
|
||||
|
||||
#define AR71XX_REV_ID_MINOR_MASK 0x3
|
||||
--- a/arch/mips/include/asm/mach-ath79/ath79.h
|
||||
+++ b/arch/mips/include/asm/mach-ath79/ath79.h
|
||||
@@ -32,6 +32,7 @@ enum ath79_soc_type {
|
||||
ATH79_SOC_AR9341,
|
||||
ATH79_SOC_AR9342,
|
||||
ATH79_SOC_AR9344,
|
||||
+ ATH79_SOC_QCA9556,
|
||||
ATH79_SOC_QCA9558,
|
||||
};
|
||||
|
||||
@@ -99,6 +100,11 @@ static inline int soc_is_ar934x(void)
|
||||
return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344();
|
||||
}
|
||||
|
||||
+static inline int soc_is_qca9556(void)
|
||||
+{
|
||||
+ return ath79_soc == ATH79_SOC_QCA9556;
|
||||
+}
|
||||
+
|
||||
static inline int soc_is_qca9558(void)
|
||||
{
|
||||
return ath79_soc == ATH79_SOC_QCA9558;
|
||||
@@ -106,7 +112,7 @@ static inline int soc_is_qca9558(void)
|
||||
|
||||
static inline int soc_is_qca955x(void)
|
||||
{
|
||||
- return soc_is_qca9558();
|
||||
+ return soc_is_qca9556() || soc_is_qca9558();
|
||||
}
|
||||
|
||||
extern void __iomem *ath79_ddr_base;
|
||||
Loading…
Reference in New Issue