diff --git a/target/linux/ramips/patches-4.14/0001-MIPS-ralink-Add-rt3352-SPI_CS1-pinmux.patch b/target/linux/ramips/patches-4.14/0001-MIPS-ralink-Add-rt3352-SPI_CS1-pinmux.patch
new file mode 100644
index 0000000000..4f803dfd0d
--- /dev/null
+++ b/target/linux/ramips/patches-4.14/0001-MIPS-ralink-Add-rt3352-SPI_CS1-pinmux.patch
@@ -0,0 +1,45 @@
+From 35d017947401d9f449a7e55e52506744e0c62577 Mon Sep 17 00:00:00 2001
+From: Mathias Kresin <dev@kresin.me>
+Date: Wed, 22 Aug 2018 22:38:06 +0200
+Subject: [PATCH] MIPS: ralink: Add rt3352 SPI_CS1 pinmux
+
+The rt3352 has a pin that can be used as second spi chip select,
+watchdog reset or GPIO. The pinmux setup was missing the definition of
+said pin.
+
+The pin is configured via the same bit on rt5350, so reuse the existing
+macro.
+
+Signed-off-by: Mathias Kresin <dev@kresin.me>
+Signed-off-by: Paul Burton <paul.burton@mips.com>
+Patchwork: https://patchwork.linux-mips.org/patch/20301/
+Cc: John Crispin <john@phrozen.org>
+Cc: Ralf Baechle <ralf@linux-mips.org>
+Cc: James Hogan <jhogan@kernel.org>
+Cc: linux-mips@linux-mips.org
+Cc: linux-kernel@vger.kernel.org
+---
+ arch/mips/ralink/rt305x.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/mips/ralink/rt305x.c
++++ b/arch/mips/ralink/rt305x.c
+@@ -49,6 +49,10 @@ static struct rt2880_pmx_func rgmii_func
+ static struct rt2880_pmx_func rt3352_lna_func[] = { FUNC("lna", 0, 36, 2) };
+ static struct rt2880_pmx_func rt3352_pa_func[] = { FUNC("pa", 0, 38, 2) };
+ static struct rt2880_pmx_func rt3352_led_func[] = { FUNC("led", 0, 40, 5) };
++static struct rt2880_pmx_func rt3352_cs1_func[] = {
++	FUNC("spi_cs1", 0, 45, 1),
++	FUNC("wdg_cs1", 1, 45, 1),
++};
+ 
+ static struct rt2880_pmx_group rt3050_pinmux_data[] = {
+ 	GRP("i2c", i2c_func, 1, RT305X_GPIO_MODE_I2C),
+@@ -75,6 +79,7 @@ static struct rt2880_pmx_group rt3352_pi
+ 	GRP("lna", rt3352_lna_func, 1, RT3352_GPIO_MODE_LNA),
+ 	GRP("pa", rt3352_pa_func, 1, RT3352_GPIO_MODE_PA),
+ 	GRP("led", rt3352_led_func, 1, RT5350_GPIO_MODE_PHY_LED),
++	GRP("spi_cs1", rt3352_cs1_func, 2, RT5350_GPIO_MODE_SPI_CS1),
+ 	{ 0 }
+ };
+