ar71xx: add an external reset callback for ar913x and use it in ath9k - should reduce the frequency of DMA stop failures

Signed-off-by: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 36530
v19.07.3_mercusys_ac12_duma
Felix Fietkau 11 years ago
parent 30c4360345
commit 18c588a570

@ -25,7 +25,43 @@
int nstations; /* number of station vifs */
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1698,12 +1698,11 @@ static void ath9k_hw_reset_opmode(struct
@@ -1366,7 +1366,10 @@ static bool ath9k_hw_set_reset(struct at
REGWRITE_BUFFER_FLUSH(ah);
- udelay(50);
+ if (AR_SREV_9100(ah))
+ mdelay(10);
+ else
+ udelay(50);
REG_WRITE(ah, AR_RTC_RC, 0);
if (!ath9k_hw_wait(ah, AR_RTC_RC, AR_RTC_RC_M, 0, AH_WAIT_TIMEOUT)) {
@@ -1377,8 +1380,12 @@ static bool ath9k_hw_set_reset(struct at
if (!AR_SREV_9100(ah))
REG_WRITE(ah, AR_RC, 0);
- if (AR_SREV_9100(ah))
+ if (AR_SREV_9100(ah) && type != ATH9K_RESET_WARM) {
+ if (ah->external_reset)
+ ah->external_reset();
+
udelay(50);
+ }
return true;
}
@@ -1464,7 +1471,8 @@ static bool ath9k_hw_chip_reset(struct a
reset_type = ATH9K_RESET_POWER_ON;
else
reset_type = ATH9K_RESET_COLD;
- } else if (ah->chip_fullsleep || REG_READ(ah, AR_Q_TXE) ||
+ } else if (ah->chip_fullsleep ||
+ REG_READ(ah, AR_Q_TXE) ||
(REG_READ(ah, AR_CR) & AR_CR_RXE))
reset_type = ATH9K_RESET_COLD;
@@ -1698,12 +1706,11 @@ static void ath9k_hw_reset_opmode(struct
ENABLE_REGWRITE_BUFFER(ah);

@ -1,6 +1,6 @@
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -2001,8 +2001,8 @@ int ath9k_hw_reset(struct ath_hw *ah, st
@@ -2009,8 +2009,8 @@ int ath9k_hw_reset(struct ath_hw *ah, st
REG_WRITE(ah, AR_OBS, 8);
if (ah->config.rx_intr_mitigation) {

@ -10,7 +10,7 @@
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -2843,7 +2843,7 @@ void ath9k_hw_apply_txpower(struct ath_h
@@ -2851,7 +2851,7 @@ void ath9k_hw_apply_txpower(struct ath_h
channel = chan->chan;
chan_pwr = min_t(int, channel->max_power * 2, MAX_RATE_POWER);
new_pwr = min_t(int, chan_pwr, reg->power_limit);

@ -94,7 +94,7 @@
void ath9k_debug_sync_cause(struct ath_common *common, u32 sync_cause);
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1845,6 +1845,20 @@ fail:
@@ -1853,6 +1853,20 @@ fail:
return -EINVAL;
}
@ -115,7 +115,7 @@
int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
struct ath9k_hw_cal_data *caldata, bool fastcc)
{
@@ -2046,6 +2060,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
@@ -2054,6 +2068,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
}
ath9k_hw_apply_gpio_override(ah);

@ -12,7 +12,7 @@
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -2439,17 +2439,25 @@ int ath9k_hw_fill_cap_info(struct ath_hw
@@ -2447,17 +2447,25 @@ int ath9k_hw_fill_cap_info(struct ath_hw
}
eeval = ah->eep_ops->get_eeprom(ah, EEP_OP_MODE);

@ -0,0 +1,31 @@
--- a/arch/mips/ath79/dev-wmac.c
+++ b/arch/mips/ath79/dev-wmac.c
@@ -44,7 +44,7 @@ static struct platform_device ath79_wmac
},
};
-static void __init ar913x_wmac_setup(void)
+static int ar913x_wmac_reset(void)
{
/* reset the WMAC */
ath79_device_reset_set(AR913X_RESET_AMBA2WMAC);
@@ -53,10 +53,19 @@ static void __init ar913x_wmac_setup(voi
ath79_device_reset_clear(AR913X_RESET_AMBA2WMAC);
mdelay(10);
+ return 0;
+}
+
+static void __init ar913x_wmac_setup(void)
+{
+ ar913x_wmac_reset();
+
ath79_wmac_resources[0].start = AR913X_WMAC_BASE;
ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1;
ath79_wmac_resources[1].start = ATH79_CPU_IRQ(2);
ath79_wmac_resources[1].end = ATH79_CPU_IRQ(2);
+
+ ath79_wmac_data.external_reset = ar913x_wmac_reset;
}

@ -16,7 +16,7 @@
static struct ath9k_platform_data ath79_wmac_data;
static struct resource ath79_wmac_resources[] = {
@@ -151,7 +153,7 @@ static void qca955x_wmac_setup(void)
@@ -160,7 +162,7 @@ static void qca955x_wmac_setup(void)
ath79_wmac_data.is_clk_25mhz = true;
}
@ -25,7 +25,7 @@
{
if (soc_is_ar913x())
ar913x_wmac_setup();
@@ -168,5 +170,10 @@ void __init ath79_register_wmac(u8 *cal_
@@ -177,5 +179,10 @@ void __init ath79_register_wmac(u8 *cal_
memcpy(ath79_wmac_data.eeprom_data, cal_data,
sizeof(ath79_wmac_data.eeprom_data));

@ -1,6 +1,6 @@
--- a/arch/mips/ath79/dev-wmac.c
+++ b/arch/mips/ath79/dev-wmac.c
@@ -180,3 +180,9 @@ void __init ath79_register_wmac(u8 *cal_
@@ -189,3 +189,9 @@ void __init ath79_register_wmac(u8 *cal_
platform_device_register(&ath79_wmac_device);
}

@ -1,6 +1,6 @@
--- a/arch/mips/ath79/dev-wmac.c
+++ b/arch/mips/ath79/dev-wmac.c
@@ -156,6 +156,137 @@ static void qca955x_wmac_setup(void)
@@ -165,6 +165,137 @@ static void qca955x_wmac_setup(void)
ath79_wmac_data.is_clk_25mhz = true;
}

@ -1,6 +1,6 @@
--- a/arch/mips/ath79/dev-wmac.c
+++ b/arch/mips/ath79/dev-wmac.c
@@ -287,6 +287,16 @@ bool __init ar93xx_wmac_read_mac_address
@@ -296,6 +296,16 @@ bool __init ar93xx_wmac_read_mac_address
return ret;
}

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