ar71xx: add kernel support for EnGenius ESR1750
Signed-off-by: Jon Suphammer <jon@suphammer.net> Patchwork: http://patchwork.openwrt.org/patch/5840/ [juhosg: - fix coding style in mach-esr1750.c, - rename and refresh kernel patch] Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 41624v19.07.3_mercusys_ac12_duma
Gabor Juhos
10 years ago
parent
ee3dfafaf1
commit
16d45d5531
@ -0,0 +1,176 @@
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/*
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* EnGenius ESR1750 board support
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*
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* Copyright (c) 2014 Jon Suphammer <jon@suphammer.net>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/platform_device.h>
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#include <linux/ar8216_platform.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "pci.h"
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#include "dev-ap9x-pci.h"
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#include "dev-gpio-buttons.h"
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#include "dev-eth.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-usb.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#include "nvram.h"
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#define ESR1750_GPIO_LED_WLAN_5G 23
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#define ESR1750_GPIO_LED_WLAN_2G 13
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#define ESR1750_GPIO_LED_POWER_AMBER 2
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#define ESR1750_GPIO_LED_WPS_AMBER 22
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#define ESR1750_GPIO_LED_WPS_BLUE 19
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#define ESR1750_GPIO_BTN_WPS 16
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#define ESR1750_GPIO_BTN_RESET 17
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#define ESR1750_KEYS_POLL_INTERVAL 20 /* msecs */
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#define ESR1750_KEYS_DEBOUNCE_INTERVAL (3 * ESR1750_KEYS_POLL_INTERVAL)
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#define ESR1750_CALDATA_ADDR 0x1fff0000
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#define ESR1750_WMAC_CALDATA_OFFSET 0x1000
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#define ESR1750_PCIE_CALDATA_OFFSET 0x5000
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#define ESR1750_NVRAM_ADDR 0x1f030000
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#define ESR1750_NVRAM_SIZE 0x10000
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static struct gpio_led esr1750_leds_gpio[] __initdata = {
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{
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.name = "esr1750:amber:power",
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.gpio = ESR1750_GPIO_LED_POWER_AMBER,
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.active_low = 1,
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},
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{
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.name = "esr1750:blue:wps",
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.gpio = ESR1750_GPIO_LED_WPS_BLUE,
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.active_low = 1,
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},
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{
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.name = "esr1750:amber:wps",
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.gpio = ESR1750_GPIO_LED_WPS_AMBER,
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.active_low = 1,
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},
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{
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.name = "esr1750:blue:wlan-2g",
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.gpio = ESR1750_GPIO_LED_WLAN_2G,
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.active_low = 1,
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},
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{
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.name = "esr1750:blue:wlan-5g",
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.gpio = ESR1750_GPIO_LED_WLAN_5G,
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.active_low = 1,
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}
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};
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static struct gpio_keys_button esr1750_gpio_keys[] __initdata = {
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{
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.desc = "WPS button",
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.type = EV_KEY,
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.code = KEY_WPS_BUTTON,
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.debounce_interval = ESR1750_KEYS_DEBOUNCE_INTERVAL,
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.gpio = ESR1750_GPIO_BTN_WPS,
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.active_low = 1,
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},
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{
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.desc = "Reset button",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = ESR1750_KEYS_DEBOUNCE_INTERVAL,
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.gpio = ESR1750_GPIO_BTN_RESET,
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.active_low = 1,
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},
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};
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static struct ar8327_pad_cfg esr1750_ar8327_pad0_cfg = {
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.mode = AR8327_PAD_MAC_RGMII,
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.txclk_delay_en = true,
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.rxclk_delay_en = true,
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.txclk_delay_sel = AR8327_CLK_DELAY_SEL2,
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.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
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};
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static struct ar8327_platform_data esr1750_ar8327_data = {
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.pad0_cfg = &esr1750_ar8327_pad0_cfg,
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.port0_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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};
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static struct mdio_board_info esr1750_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = 0,
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.platform_data = &esr1750_ar8327_data,
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},
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};
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static int esr1750_get_mac(const char *name, char *mac)
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{
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u8 *nvram = (u8 *) KSEG1ADDR(ESR1750_NVRAM_ADDR);
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int err;
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err = ath79_nvram_parse_mac_addr(nvram, ESR1750_NVRAM_SIZE,
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name, mac);
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if (err) {
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pr_err("no MAC address found for %s\n", name);
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return false;
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}
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return true;
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}
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static void __init esr1750_setup(void)
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{
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u8 *caldata = (u8 *) KSEG1ADDR(ESR1750_CALDATA_ADDR);
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u8 mac1[ETH_ALEN];
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ath79_register_m25p80(NULL);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(esr1750_leds_gpio),
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esr1750_leds_gpio);
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ath79_register_gpio_keys_polled(-1, ESR1750_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(esr1750_gpio_keys),
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esr1750_gpio_keys);
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ath79_register_usb();
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ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
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ath79_register_mdio(0, 0x0);
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mdiobus_register_board_info(esr1750_mdio0_info,
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ARRAY_SIZE(esr1750_mdio0_info));
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/* GMAC0 is connected to an QCA8327N switch */
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = BIT(0);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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if (esr1750_get_mac("ethaddr=", mac1))
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ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
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ath79_eth0_pll_data.pll_1000 = 0xa6000000;
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ath79_register_eth(0);
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ath79_register_wmac(caldata + ESR1750_WMAC_CALDATA_OFFSET, mac1);
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ath79_register_pci();
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}
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MIPS_MACHINE(ATH79_MACH_ESR1750, "ESR1750",
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"EnGenius ESR1750",
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esr1750_setup);
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@ -0,0 +1,39 @@
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--- a/arch/mips/ath79/Kconfig
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+++ b/arch/mips/ath79/Kconfig
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@@ -177,6 +177,16 @@ config ATH79_MACH_AW_NR580
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select ATH79_DEV_LEDS_GPIO
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select ATH79_DEV_M25P80
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+config ATH79_MACH_ESR1750
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+ bool "EnGenius ESR1750 board support"
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+ select SOC_QCA955X
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+ select ATH79_DEV_ETH
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+ select ATH79_DEV_GPIO_BUTTONS
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+ select ATH79_DEV_LEDS_GPIO
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+ select ATH79_DEV_SPI
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+ select ATH79_DEV_USB
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+ select ATH79_DEV_WMAC
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+
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config ATH79_MACH_WHR_HP_G300N
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bool "Buffalo WHR-HP-G300N board support"
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select SOC_AR724X
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--- a/arch/mips/ath79/Makefile
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+++ b/arch/mips/ath79/Makefile
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@@ -64,6 +64,7 @@ obj-$(CONFIG_ATH79_MACH_EW_DORIN) += mac
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obj-$(CONFIG_ATH79_MACH_EAP7660D) += mach-eap7660d.o
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obj-$(CONFIG_ATH79_MACH_EL_M150) += mach-el-m150.o
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obj-$(CONFIG_ATH79_MACH_EL_MINI) += mach-el-mini.o
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+obj-$(CONFIG_ATH79_MACH_ESR1750) += mach-esr1750.o
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obj-$(CONFIG_ATH79_MACH_GL_INET) += mach-gl-inet.o
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obj-$(CONFIG_ATH79_MACH_GS_OOLITE) += mach-gs-oolite.o
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obj-$(CONFIG_ATH79_MACH_HIWIFI_HC6361) += mach-hiwifi-hc6361.o
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--- a/arch/mips/ath79/machtypes.h
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+++ b/arch/mips/ath79/machtypes.h
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@@ -52,6 +52,7 @@ enum ath79_mach_type {
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ATH79_MACH_EAP7660D, /* Senao EAP7660D */
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ATH79_MACH_EL_M150, /* EasyLink EL-M150 */
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ATH79_MACH_EL_MINI, /* EasyLink EL-MINI */
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+ ATH79_MACH_ESR1750, /* EnGenius ESR1750 */
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ATH79_MACH_GL_INET, /* GL-CONNECT GL-INET */
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ATH79_MACH_GS_OOLITE, /* GS OOLITE V1.0 */
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ATH79_MACH_HIWIFI_HC6361, /* HiWiFi HC6361 */
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