toolchain/gcc: merge pending fix for miscompiled MIPS16 code issue (GCC PR 84790)

Signed-off-by: Felix Fietkau <nbd@nbd.name>

toolchain/gcc/patches/7.3.0/110-Fix-MIPS-PR-84790.patch

@@ -0,0 +1,20 @@
+Fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790.
+MIPS16 functions have a static assembler prologue which clobbers
+registers v0 and v1. Add these register clobbers to function call
+instructions.
+
+--- a/gcc/config/mips/mips.c
++++ b/gcc/config/mips/mips.c
+@@ -3098,6 +3098,12 @@ mips_emit_call_insn (rtx pattern, rtx or
+       emit_insn (gen_update_got_version ());
+     }
+ 
++  if (TARGET_MIPS16 && TARGET_USE_GOT)
++    {
++      clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP);
++      clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS_PROLOGUE_TEMP (word_mode));
++    }
++
+   if (TARGET_MIPS16
+       && TARGET_EXPLICIT_RELOCS
+       && TARGET_CALL_CLOBBERED_GP)

toolchain/gcc/patches/7.3.0/300-mips_Os_cpu_rtx_cost_model.patch

@@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
 
 --- a/gcc/config/mips/mips.c
 +++ b/gcc/config/mips/mips.c
-@@ -19784,7 +19784,7 @@ mips_option_override (void)
+@@ -19790,7 +19790,7 @@ mips_option_override (void)
      flag_pcc_struct_return = 0;
  
    /* Decide which rtx_costs structure to use.  */

toolchain/gcc/patches/7.3.0/930-fix-mips-noexecstack.patch

@@ -48,7 +48,7 @@ sellcey@mips.com
 
 --- a/gcc/config/mips/mips.c
 +++ b/gcc/config/mips/mips.c
-@@ -22561,6 +22561,9 @@ mips_promote_function_mode (const_tree t
+@@ -22567,6 +22567,9 @@ mips_promote_function_mode (const_tree t
  #undef TARGET_CUSTOM_FUNCTION_DESCRIPTORS
  #define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 2