ar71xx: improve SPI flash read/write performance
mtd_speedtest results:
page write speed
old new delta
DB120 209 KiB/s 226 KiB/s +8.13%
TL-WR1043ND v1 122 KiB/s 148 KiB/s +21.31%
TL-WR703N v1 153 KiB/s 194 KiB/s +26.80%
TL-MR3220 v1 130 KiB/s 156 KiB/s +20.00%
TL-WR2543ND v1 158 KiB/s 202 KiB/s +27.85%
TL-WR741ND v2 122 KiB/s 152 KiB/s +24.59%
ALFA AP96 229 KiB/s 260 KiB/s +13.54%
WNDR3700 202 KiB/s 223 KiB/s +10.40%
page read speed
old new delta
DB120 691 KiB/s 929 KiB/s +34.44%
TL-WR1043ND v1 372 KiB/s 754 KiB/s +102.69%
TL-WR703N v1 375 KiB/s 745 KiB/s +98.67%
TL-MR3220 v1 372 KiB/s 752 KiB/s +102.15%
TL-WR2543ND v1 307 KiB/s 564 KiB/s +83.71%
TL-WR741ND v2 315 KiB/s 525 KiB/s +66.67%
ALFA AP96 515 KiB/s 702 KiB/s +36.31%
WNDR3700 515 KiB/s 697 KiB/s +35.34%
SVN-Revision: 31117
v19.07.3_mercusys_ac12_duma
Gabor Juhos
12 years ago
parent
6455178a6a
commit
102c6df148
@ -1,20 +1,21 @@
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From 0ad8cbbb978bc01de08eadd3357ea188302b83ce Mon Sep 17 00:00:00 2001
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From ea7e40aedae58b7a0f0ccd8658063de499734874 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Wed, 11 Jan 2012 20:33:41 +0100
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Subject: [PATCH 2/7] spi/ath79: add missing HIGH->LOW SCK transition
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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---
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drivers/spi/spi-ath79.c | 1 +
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1 files changed, 1 insertions(+), 0 deletions(-)
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drivers/spi/spi-ath79.c | 2 ++
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1 files changed, 2 insertions(+), 0 deletions(-)
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--- a/drivers/spi/spi-ath79.c
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+++ b/drivers/spi/spi-ath79.c
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@@ -193,6 +193,7 @@ static u32 ath79_spi_txrx_mode0(struct s
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ath79_spi_delay(nsecs);
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@@ -200,6 +200,8 @@ static u32 ath79_spi_txrx_mode0(struct s
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ath79_spi_delay(sp, nsecs);
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ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out | AR71XX_SPI_IOC_CLK);
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ath79_spi_delay(nsecs);
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+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out);
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ath79_spi_delay(sp, nsecs);
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+ if (bits == 1)
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+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out);
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word <<= 1;
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}
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@ -0,0 +1,21 @@
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--- a/arch/mips/ath79/mach-db120.c
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+++ b/arch/mips/ath79/mach-db120.c
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@@ -95,12 +95,18 @@ static struct gpio_keys_button db120_gpi
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},
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};
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+static struct ath79_spi_controller_data db120_spi0_data = {
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+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
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+ .cs_line = 0,
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+};
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+
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static struct spi_board_info db120_spi_info[] = {
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{
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.bus_num = 0,
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.chip_select = 0,
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.max_speed_hz = 25000000,
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.modalias = "s25sl064a",
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+ .controller_data = &db120_spi0_data,
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}
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};
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@ -1,105 +0,0 @@
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--- a/arch/mips/ath79/mach-ap121.c
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+++ b/arch/mips/ath79/mach-ap121.c
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@@ -58,12 +58,18 @@ static struct gpio_keys_button ap121_gpi
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}
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};
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+static struct ath79_spi_controller_data ap121_spi0_data = {
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+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
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+ .cs_line = 0,
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+};
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+
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static struct spi_board_info ap121_spi_info[] = {
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{
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.bus_num = 0,
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.chip_select = 0,
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.max_speed_hz = 25000000,
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.modalias = "mx25l1606e",
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+ .controller_data = &ap121_spi0_data,
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}
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};
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--- a/arch/mips/ath79/mach-ap81.c
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+++ b/arch/mips/ath79/mach-ap81.c
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@@ -67,12 +67,18 @@ static struct gpio_keys_button ap81_gpio
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}
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};
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+static struct ath79_spi_controller_data ap81_spi0_data = {
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+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
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+ .cs_line = 0,
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+};
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+
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static struct spi_board_info ap81_spi_info[] = {
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{
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.bus_num = 0,
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.chip_select = 0,
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.max_speed_hz = 25000000,
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.modalias = "m25p64",
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+ .controller_data = &ap81_spi0_data,
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}
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};
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--- a/arch/mips/ath79/mach-db120.c
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+++ b/arch/mips/ath79/mach-db120.c
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@@ -95,12 +95,18 @@ static struct gpio_keys_button db120_gpi
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},
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};
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+static struct ath79_spi_controller_data db120_spi0_data = {
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+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
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+ .cs_line = 0,
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+};
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+
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static struct spi_board_info db120_spi_info[] = {
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{
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.bus_num = 0,
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.chip_select = 0,
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.max_speed_hz = 25000000,
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.modalias = "s25sl064a",
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+ .controller_data = &db120_spi0_data,
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}
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};
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--- a/arch/mips/ath79/mach-pb44.c
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+++ b/arch/mips/ath79/mach-pb44.c
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@@ -87,12 +87,18 @@ static struct gpio_keys_button pb44_gpio
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}
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};
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+static struct ath79_spi_controller_data pb44_spi0_data = {
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+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
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+ .cs_line = 0,
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+};
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+
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static struct spi_board_info pb44_spi_info[] = {
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{
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.bus_num = 0,
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.chip_select = 0,
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.max_speed_hz = 25000000,
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.modalias = "m25p64",
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+ .controller_data = &pb44_spi0_data,
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},
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};
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--- a/arch/mips/ath79/mach-ubnt-xm.c
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+++ b/arch/mips/ath79/mach-ubnt-xm.c
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@@ -65,12 +65,18 @@ static struct gpio_keys_button ubnt_xm_g
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}
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};
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+static struct ath79_spi_controller_data ubnt_xm_spi0_data = {
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+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
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+ .cs_line = 0,
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+};
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+
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static struct spi_board_info ubnt_xm_spi_info[] = {
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{
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.bus_num = 0,
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.chip_select = 0,
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.max_speed_hz = 25000000,
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.modalias = "mx25l6405d",
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+ .controller_data = &ubnt_xm_spi0_data,
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}
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};
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@ -1,20 +1,21 @@
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From 0ad8cbbb978bc01de08eadd3357ea188302b83ce Mon Sep 17 00:00:00 2001
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From ea7e40aedae58b7a0f0ccd8658063de499734874 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Wed, 11 Jan 2012 20:33:41 +0100
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Subject: [PATCH 2/7] spi/ath79: add missing HIGH->LOW SCK transition
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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---
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drivers/spi/spi-ath79.c | 1 +
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1 files changed, 1 insertions(+), 0 deletions(-)
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drivers/spi/spi-ath79.c | 2 ++
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1 files changed, 2 insertions(+), 0 deletions(-)
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--- a/drivers/spi/spi-ath79.c
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+++ b/drivers/spi/spi-ath79.c
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@@ -193,6 +193,7 @@ static u32 ath79_spi_txrx_mode0(struct s
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ath79_spi_delay(nsecs);
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@@ -200,6 +200,8 @@ static u32 ath79_spi_txrx_mode0(struct s
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ath79_spi_delay(sp, nsecs);
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ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out | AR71XX_SPI_IOC_CLK);
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ath79_spi_delay(nsecs);
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+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out);
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ath79_spi_delay(sp, nsecs);
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+ if (bits == 1)
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+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out);
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word <<= 1;
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}
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@ -0,0 +1,21 @@
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--- a/arch/mips/ath79/mach-db120.c
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+++ b/arch/mips/ath79/mach-db120.c
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@@ -95,12 +95,18 @@ static struct gpio_keys_button db120_gpi
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},
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};
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+static struct ath79_spi_controller_data db120_spi0_data = {
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+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
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+ .cs_line = 0,
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+};
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+
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static struct spi_board_info db120_spi_info[] = {
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{
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.bus_num = 0,
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.chip_select = 0,
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.max_speed_hz = 25000000,
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.modalias = "s25sl064a",
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+ .controller_data = &db120_spi0_data,
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}
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};
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@ -1,105 +0,0 @@
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--- a/arch/mips/ath79/mach-ap121.c
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+++ b/arch/mips/ath79/mach-ap121.c
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@@ -58,12 +58,18 @@ static struct gpio_keys_button ap121_gpi
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}
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};
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+static struct ath79_spi_controller_data ap121_spi0_data = {
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+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
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+ .cs_line = 0,
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+};
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+
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static struct spi_board_info ap121_spi_info[] = {
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{
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.bus_num = 0,
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.chip_select = 0,
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.max_speed_hz = 25000000,
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.modalias = "mx25l1606e",
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+ .controller_data = &ap121_spi0_data,
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}
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};
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--- a/arch/mips/ath79/mach-ap81.c
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+++ b/arch/mips/ath79/mach-ap81.c
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@@ -67,12 +67,18 @@ static struct gpio_keys_button ap81_gpio
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}
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};
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+static struct ath79_spi_controller_data ap81_spi0_data = {
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+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
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+ .cs_line = 0,
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+};
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+
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static struct spi_board_info ap81_spi_info[] = {
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{
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.bus_num = 0,
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.chip_select = 0,
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.max_speed_hz = 25000000,
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.modalias = "m25p64",
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+ .controller_data = &ap81_spi0_data,
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}
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};
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--- a/arch/mips/ath79/mach-db120.c
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+++ b/arch/mips/ath79/mach-db120.c
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@@ -95,12 +95,18 @@ static struct gpio_keys_button db120_gpi
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},
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};
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+static struct ath79_spi_controller_data db120_spi0_data = {
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+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
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+ .cs_line = 0,
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+};
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+
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static struct spi_board_info db120_spi_info[] = {
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{
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.bus_num = 0,
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.chip_select = 0,
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.max_speed_hz = 25000000,
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.modalias = "s25sl064a",
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+ .controller_data = &db120_spi0_data,
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}
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};
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--- a/arch/mips/ath79/mach-pb44.c
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+++ b/arch/mips/ath79/mach-pb44.c
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@@ -87,12 +87,18 @@ static struct gpio_keys_button pb44_gpio
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}
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};
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+static struct ath79_spi_controller_data pb44_spi0_data = {
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+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
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+ .cs_line = 0,
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+};
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+
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static struct spi_board_info pb44_spi_info[] = {
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{
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.bus_num = 0,
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.chip_select = 0,
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.max_speed_hz = 25000000,
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.modalias = "m25p64",
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+ .controller_data = &pb44_spi0_data,
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},
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};
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--- a/arch/mips/ath79/mach-ubnt-xm.c
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+++ b/arch/mips/ath79/mach-ubnt-xm.c
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@@ -65,12 +65,18 @@ static struct gpio_keys_button ubnt_xm_g
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}
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};
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+static struct ath79_spi_controller_data ubnt_xm_spi0_data = {
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+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
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+ .cs_line = 0,
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+};
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+
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static struct spi_board_info ubnt_xm_spi_info[] = {
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{
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.bus_num = 0,
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.chip_select = 0,
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.max_speed_hz = 25000000,
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.modalias = "mx25l6405d",
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+ .controller_data = &ubnt_xm_spi0_data,
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}
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};
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