ipq806x: use mdio dedicated driver

Enable kernel config flag
Convert all dts to use the new mdio driver

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
master
Ansuel Smith 4 years ago committed by Petr Štetiar
parent 92da53b12d
commit 0d8098548e

@ -29,12 +29,17 @@
};
soc {
mdio0: mdio {
compatible = "virtual,mdio-gpio";
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
@ -94,7 +99,7 @@
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
function = "gpio";
function = "mdio";
drive-strength = <8>;
bias-disable;
};

@ -73,7 +73,7 @@
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
function = "gpio";
function = "mdio";
drive-strength = <8>;
bias-disable;
};
@ -184,11 +184,17 @@
};
};
mdio0: mdio {
compatible = "virtual,mdio-gpio";
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";

@ -94,7 +94,7 @@
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
function = "gpio";
function = "mdio";
drive-strength = <8>;
bias-disable;
};
@ -338,12 +338,17 @@
force_gen1 = <1>;
};
mdio0: mdio {
compatible = "virtual,mdio-gpio";
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";

@ -69,7 +69,7 @@
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
function = "gpio";
function = "mdio";
drive-strength = <8>;
bias-disable;
};
@ -261,12 +261,17 @@
};
};
mdio0: mdio {
compatible = "virtual,mdio-gpio";
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";

@ -43,7 +43,7 @@
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
function = "gpio";
function = "mdio";
drive-strength = <8>;
bias-disable;
};
@ -143,11 +143,16 @@
status = "okay";
};
mdio0: mdio {
compatible = "virtual,mdio-gpio";
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";

@ -69,7 +69,7 @@
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
function = "gpio";
function = "mdio";
drive-strength = <8>;
bias-disable;
};
@ -277,12 +277,17 @@
};
};
mdio0: mdio {
compatible = "virtual,mdio-gpio";
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";

@ -70,7 +70,7 @@
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
function = "gpio";
function = "mdio";
drive-strength = <8>;
bias-disable;
};
@ -222,12 +222,17 @@
};
};
mdio0: mdio {
compatible = "virtual,mdio-gpio";
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";

@ -74,7 +74,7 @@
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
function = "gpio";
function = "mdio";
drive-strength = <8>;
bias-disable;
};
@ -256,12 +256,17 @@
};
};
mdio0: mdio {
compatible = "virtual,mdio-gpio";
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";

@ -92,7 +92,7 @@
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
function = "gpio";
function = "mdio";
drive-strength = <8>;
bias-disable;
};
@ -250,12 +250,17 @@
force_gen1 = <1>;
};
mdio0: mdio {
compatible = "virtual,mdio-gpio";
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";

@ -36,12 +36,17 @@
};
soc {
mdio0: mdio {
compatible = "virtual,mdio-gpio";
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
@ -399,7 +404,7 @@
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
function = "gpio";
function = "mdio";
drive-strength = <8>;
bias-disable;
};

@ -217,18 +217,20 @@
};
};
mdio0: mdio {
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "virtual,mdio-gpio";
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
@ -531,7 +533,7 @@
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
function = "gpio";
function = "mdio";
drive-strength = <8>;
bias-disable;
};

@ -70,12 +70,17 @@
};
};
mdio {
compatible = "virtual,mdio-gpio";
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
@ -466,7 +471,7 @@
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
function = "gpio";
function = "mdio";
drive-strength = <8>;
bias-disable;
};

@ -70,7 +70,7 @@
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
function = "gpio";
function = "mdio";
drive-strength = <8>;
bias-disable;
};
@ -218,12 +218,17 @@
force_gen1 = <1>;
};
mdio0: mdio {
compatible = "virtual,mdio-gpio";
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";

@ -100,7 +100,7 @@
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
function = "gpio";
function = "mdio";
drive-strength = <8>;
bias-disable;
};
@ -351,16 +351,20 @@
};
};
mdio0: mdio {
compatible = "virtual,mdio-gpio";
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <

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