|
|
|
|
CONFIG_ARCH_BINFMT_ELF_STATE=y
|
|
|
|
|
CONFIG_ARCH_CLOCKSOURCE_DATA=y
|
|
|
|
|
CONFIG_ARCH_DISCARD_MEMBLOCK=y
|
|
|
|
|
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
|
|
|
|
|
# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
|
|
|
|
|
CONFIG_ARCH_HAS_RESET_CONTROLLER=y
|
|
|
|
|
# CONFIG_ARCH_HAS_SG_CHAIN is not set
|
|
|
|
|
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
|
|
|
|
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
|
|
|
|
|
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
|
|
|
|
|
CONFIG_ARCH_SUPPORTS_UPROBES=y
|
|
|
|
|
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
|
|
|
|
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
|
|
|
|
|
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
|
|
|
|
|
CONFIG_AT803X_PHY=y
|
|
|
|
|
CONFIG_BLK_MQ_PCI=y
|
|
|
|
|
CONFIG_CEVT_R4K=y
|
|
|
|
|
CONFIG_CEVT_SYSTICK_QUIRK=y
|
|
|
|
|
CONFIG_CLKDEV_LOOKUP=y
|
|
|
|
|
CONFIG_CLKEVT_RT3352=y
|
|
|
|
|
CONFIG_CLKSRC_MMIO=y
|
|
|
|
|
CONFIG_CLKSRC_OF=y
|
|
|
|
|
CONFIG_CLKSRC_PROBE=y
|
|
|
|
|
CONFIG_CLONE_BACKWARDS=y
|
|
|
|
|
CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
|
|
|
|
|
CONFIG_CMDLINE_BOOL=y
|
|
|
|
|
# CONFIG_CMDLINE_OVERRIDE is not set
|
|
|
|
|
CONFIG_CPU_GENERIC_DUMP_TLB=y
|
|
|
|
|
CONFIG_CPU_HAS_PREFETCH=y
|
|
|
|
|
CONFIG_CPU_HAS_RIXI=y
|
|
|
|
|
CONFIG_CPU_HAS_SYNC=y
|
|
|
|
|
CONFIG_CPU_LITTLE_ENDIAN=y
|
|
|
|
|
CONFIG_CPU_MIPS32=y
|
|
|
|
|
# CONFIG_CPU_MIPS32_R1 is not set
|
|
|
|
|
CONFIG_CPU_MIPS32_R2=y
|
|
|
|
|
CONFIG_CPU_MIPSR2=y
|
|
|
|
|
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
|
|
|
|
|
CONFIG_CPU_R4K_CACHE_TLB=y
|
|
|
|
|
CONFIG_CPU_R4K_FPU=y
|
|
|
|
|
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
|
|
|
|
|
CONFIG_CPU_SUPPORTS_HIGHMEM=y
|
|
|
|
|
CONFIG_CPU_SUPPORTS_MSA=y
|
|
|
|
|
CONFIG_CRYPTO_RNG2=y
|
|
|
|
|
CONFIG_CRYPTO_WORKQUEUE=y
|
|
|
|
|
CONFIG_CSRC_R4K=y
|
|
|
|
|
CONFIG_DEBUG_PINCTRL=y
|
|
|
|
|
CONFIG_DMA_NONCOHERENT=y
|
|
|
|
|
# CONFIG_DTB_MT7620A_EVAL is not set
|
|
|
|
|
CONFIG_DTB_RT_NONE=y
|
|
|
|
|
CONFIG_DTC=y
|
|
|
|
|
CONFIG_EARLY_PRINTK=y
|
|
|
|
|
CONFIG_FIXED_PHY=y
|
|
|
|
|
CONFIG_GENERIC_ATOMIC64=y
|
|
|
|
|
CONFIG_GENERIC_CLOCKEVENTS=y
|
|
|
|
|
CONFIG_GENERIC_CMOS_UPDATE=y
|
|
|
|
|
CONFIG_GENERIC_IO=y
|
|
|
|
|
CONFIG_GENERIC_IRQ_CHIP=y
|
|
|
|
|
CONFIG_GENERIC_IRQ_SHOW=y
|
|
|
|
|
CONFIG_GENERIC_PCI_IOMAP=y
|
|
|
|
|
CONFIG_GENERIC_PHY=y
|
|
|
|
|
CONFIG_GENERIC_SCHED_CLOCK=y
|
|
|
|
|
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
|
|
|
|
CONFIG_GENERIC_TIME_VSYSCALL=y
|
|
|
|
|
CONFIG_GPIOLIB=y
|
|
|
|
|
CONFIG_GPIO_MT7621=y
|
|
|
|
|
# CONFIG_GPIO_RALINK is not set
|
|
|
|
|
CONFIG_GPIO_SYSFS=y
|
|
|
|
|
CONFIG_HANDLE_DOMAIN_IRQ=y
|
|
|
|
|
CONFIG_HARDWARE_WATCHPOINTS=y
|
|
|
|
|
CONFIG_HAS_DMA=y
|
|
|
|
|
CONFIG_HAS_IOMEM=y
|
|
|
|
|
CONFIG_HAS_IOPORT_MAP=y
|
|
|
|
|
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
|
|
|
|
|
# CONFIG_HAVE_ARCH_BITREVERSE is not set
|
|
|
|
|
CONFIG_HAVE_ARCH_JUMP_LABEL=y
|
|
|
|
|
CONFIG_HAVE_ARCH_KGDB=y
|
|
|
|
|
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
|
|
|
|
|
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
|
|
|
|
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
|
|
|
|
|
CONFIG_HAVE_CBPF_JIT=y
|
|
|
|
|
CONFIG_HAVE_CC_STACKPROTECTOR=y
|
|
|
|
|
CONFIG_HAVE_CLK=y
|
|
|
|
|
CONFIG_HAVE_CONTEXT_TRACKING=y
|
|
|
|
|
CONFIG_HAVE_C_RECORDMCOUNT=y
|
|
|
|
|
CONFIG_HAVE_DEBUG_KMEMLEAK=y
|
|
|
|
|
CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
|
|
|
|
|
CONFIG_HAVE_DMA_API_DEBUG=y
|
|
|
|
|
CONFIG_HAVE_DMA_CONTIGUOUS=y
|
|
|
|
|
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
|
|
|
|
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
|
|
|
|
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
|
|
|
|
CONFIG_HAVE_FUNCTION_TRACER=y
|
|
|
|
|
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
|
|
|
|
CONFIG_HAVE_IDE=y
|
|
|
|
|
CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
|
|
|
|
|
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
|
|
|
|
|
CONFIG_HAVE_KVM=y
|
|
|
|
|
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
|
|
|
|
|
CONFIG_HAVE_MEMBLOCK=y
|
|
|
|
|
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
|
|
|
|
|
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
|
|
|
|
|
CONFIG_HAVE_NET_DSA=y
|
|
|
|
|
CONFIG_HAVE_OPROFILE=y
|
|
|
|
|
CONFIG_HAVE_PERF_EVENTS=y
|
|
|
|
|
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
|
|
|
|
|
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
|
|
|
|
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
|
|
|
|
|
CONFIG_HW_HAS_PCI=y
|
|
|
|
|
CONFIG_HZ_PERIODIC=y
|
|
|
|
|
CONFIG_ICPLUS_PHY=y
|
|
|
|
|
CONFIG_INITRAMFS_SOURCE=""
|
|
|
|
|
CONFIG_IRQCHIP=y
|
|
|
|
|
CONFIG_IRQ_DOMAIN=y
|
|
|
|
|
CONFIG_IRQ_FORCED_THREADING=y
|
|
|
|
|
CONFIG_IRQ_INTC=y
|
|
|
|
|
CONFIG_IRQ_MIPS_CPU=y
|
|
|
|
|
CONFIG_IRQ_WORK=y
|
|
|
|
|
CONFIG_LIBFDT=y
|
|
|
|
|
CONFIG_MDIO_BOARDINFO=y
|
|
|
|
|
CONFIG_MIPS=y
|
|
|
|
|
CONFIG_MIPS_ASID_BITS=8
|
|
|
|
|
CONFIG_MIPS_ASID_SHIFT=0
|
|
|
|
|
CONFIG_MIPS_CLOCK_VSYSCALL=y
|
|
|
|
|
# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
|
|
|
|
|
# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
|
|
|
|
|
# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
|
|
|
|
|
CONFIG_MIPS_CMDLINE_FROM_DTB=y
|
|
|
|
|
# CONFIG_MIPS_ELF_APPENDED_DTB is not set
|
|
|
|
|
# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
|
|
|
|
|
CONFIG_MIPS_L1_CACHE_SHIFT=5
|
|
|
|
|
# CONFIG_MIPS_MACHINE is not set
|
|
|
|
|
CONFIG_MIPS_NO_APPENDED_DTB=y
|
|
|
|
|
# CONFIG_MIPS_RAW_APPENDED_DTB is not set
|
|
|
|
|
CONFIG_MIPS_SPRAM=y
|
|
|
|
|
CONFIG_MODULES_USE_ELF_REL=y
|
|
|
|
|
CONFIG_MT7621_WDT=y
|
|
|
|
|
# CONFIG_MTD_CFI_INTELEXT is not set
|
|
|
|
|
CONFIG_MTD_CMDLINE_PARTS=y
|
|
|
|
|
CONFIG_MTD_M25P80=y
|
|
|
|
|
CONFIG_MTD_PHYSMAP=y
|
|
|
|
|
CONFIG_MTD_SPI_NOR=y
|
|
|
|
|
CONFIG_MTD_SPLIT_FIRMWARE=y
|
ramips: add support for TP-Link TL-WR840N v4 and TL-WR841N v13
TP-Link TL-WR840N v4 and TL-WR841N v13 are simple N300 routers with
5-port FE switch and non-detachable antennas. Both are very similar
and are based on MediaTek MT7628NN (aka MT7628N) WiSoC.
The difference between these two models is in number of available
LEDs, buttons and power input switch.
This work is partially based on GitHub PR#974.
Specification:
- MT7628N/N (580 MHz)
- 64 MB of RAM (DDR2)
- 8 MB of FLASH
- 2T2R 2.4 GHz
- 5x 10/100 Mbps Ethernet
- 2x external, non-detachable antennas
- UART (J1) header on PCB (115200 8n1)
- TL-WR840N v4: 5x LED (GPIO-controlled), 1x button
- TL-WR841N v13: 8x LED (GPIO-controlled*), 2x button, power input
switch
* WAN LED in TL-WR841N v13 is a dual-color, dual-leads type which isn't
(fully) supported by gpio-leds driver. This type of LED requires both
GPIOs state change at the same time to select color or turn it off.
For now, we support/use only the green part of the LED.
Factory image notes:
These devices use version 3 of TP-Link header, fortunately without RSA
signature (at least in case of devices sold in Europe). The difference
lays in the requirement for a non-zero value in "Additional Hardware
Version" field. Ideally, it should match the value stored in vendor
firmware header on device ("0x4"/"0x13" for these devices) but it seems
that anything other than "0" is correct.
We are able to prepare factory firwmare file which is accepted and
(almost) correctly flashed from the vendor GUI. As it turned out, it
accepts files without U-Boot image with second header at the beginning
but due to some kind of bug in upgrade routine, flashed image gets
corrupted before it's written to flash.
Tests showed that the GUI upgrade routine copies value of "Additional
Hardware Version" from existing firmware into offset "0x2023c" in
provided file, _before_ storing it in flash. In case of vendor firmware
upgrade files (which all include U-Boot image and two headers), this
offset points to the matching field in kernel+rootfs firmware part
header. Unfortunately, in case of LEDE factory image file which contains
only one header, it points to the offset "0x2023c" in kernel image. This
leads to a corrupted kernel and ends up with a "soft-bricked" device.
The good news is that U-Boot in these devices contains well known tftp
recovery mode, which can be triggered with "reset" button. What's more,
in comparison to some of older MediaTek based TP-Link devices, this
recovery mode doesn't write whole file at offset "0x0" in flash, without
verifying provided file in advance. In case of recovery mode in these
devices, first "0x20000" bytes are always skipped and "0x7a0000" bytes
from rest of the file are stored in flash at offset "0x20000".
Flash instruction:
Until (if at all) TP-Link fixes described problem, the only way to flash
LEDE image in these devices is to use tftp recovery mode in U-Boot:
1. Configure PC with static IP 192.168.0.66/24 and tftp server.
2. Rename "lede-ramips-mt7628-tl-wr84...-squashfs-tftp-recovery.bin"
to "tp_recovery.bin" and place it in tftp server directory.
3. Connect PC with one of LAN ports, press the reset button, power up
the router and keep button pressed for around 6-7 seconds, until
device starts downloading the file.
4. Router will download file from server, write it to flash and reboot.
To access U-Boot CLI, keep pressed "4" key during boot.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
7 years ago
|
|
|
CONFIG_MTD_SPLIT_TPLINK_FW=y
|
|
|
|
|
CONFIG_MTD_SPLIT_TRX_FW=y
|
|
|
|
|
CONFIG_MTD_SPLIT_UIMAGE_FW=y
|
|
|
|
|
CONFIG_NEED_DMA_MAP_STATE=y
|
|
|
|
|
CONFIG_NEED_PER_CPU_KM=y
|
|
|
|
|
CONFIG_NET_MEDIATEK_ESW_RT3050=y
|
|
|
|
|
# CONFIG_NET_MEDIATEK_MT7620 is not set
|
|
|
|
|
CONFIG_NET_MEDIATEK_RT3050=y
|
|
|
|
|
CONFIG_NET_MEDIATEK_SOC=y
|
|
|
|
|
CONFIG_NET_VENDOR_MEDIATEK=y
|
|
|
|
|
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
|
|
|
|
|
# CONFIG_NO_IOPORT_MAP is not set
|
|
|
|
|
CONFIG_OF=y
|
|
|
|
|
CONFIG_OF_ADDRESS=y
|
|
|
|
|
CONFIG_OF_ADDRESS_PCI=y
|
|
|
|
|
CONFIG_OF_EARLY_FLATTREE=y
|
|
|
|
|
CONFIG_OF_FLATTREE=y
|
|
|
|
|
CONFIG_OF_GPIO=y
|
|
|
|
|
CONFIG_OF_IRQ=y
|
|
|
|
|
CONFIG_OF_MDIO=y
|
|
|
|
|
CONFIG_OF_NET=y
|
|
|
|
|
CONFIG_OF_PCI=y
|
|
|
|
|
CONFIG_OF_PCI_IRQ=y
|
|
|
|
|
CONFIG_PCI=y
|
|
|
|
|
CONFIG_PCI_DOMAINS=y
|
|
|
|
|
CONFIG_PCI_DRIVERS_LEGACY=y
|
|
|
|
|
CONFIG_PERF_USE_VMALLOC=y
|
|
|
|
|
CONFIG_PGTABLE_LEVELS=2
|
|
|
|
|
CONFIG_PHYLIB=y
|
|
|
|
|
CONFIG_PHY_RALINK_USB=y
|
|
|
|
|
CONFIG_PINCTRL=y
|
|
|
|
|
CONFIG_PINCTRL_RT2880=y
|
|
|
|
|
# CONFIG_PINCTRL_SINGLE is not set
|
|
|
|
|
CONFIG_RALINK=y
|
|
|
|
|
# CONFIG_RALINK_WDT is not set
|
|
|
|
|
# CONFIG_RCU_STALL_COMMON is not set
|
|
|
|
|
CONFIG_RESET_CONTROLLER=y
|
|
|
|
|
# CONFIG_SCHED_INFO is not set
|
|
|
|
|
# CONFIG_SCSI_DMA is not set
|
|
|
|
|
# CONFIG_SERIAL_8250_FSL is not set
|
|
|
|
|
CONFIG_SERIAL_8250_NR_UARTS=3
|
|
|
|
|
CONFIG_SERIAL_8250_RUNTIME_UARTS=3
|
|
|
|
|
CONFIG_SERIAL_OF_PLATFORM=y
|
|
|
|
|
CONFIG_SOC_MT7620=y
|
|
|
|
|
# CONFIG_SOC_MT7621 is not set
|
|
|
|
|
# CONFIG_SOC_RT288X is not set
|
|
|
|
|
# CONFIG_SOC_RT305X is not set
|
|
|
|
|
# CONFIG_SOC_RT3883 is not set
|
|
|
|
|
CONFIG_SPI=y
|
|
|
|
|
CONFIG_SPI_MASTER=y
|
|
|
|
|
CONFIG_SPI_MT7621=y
|
|
|
|
|
# CONFIG_SPI_RT2880 is not set
|
|
|
|
|
CONFIG_SRCU=y
|
|
|
|
|
CONFIG_SWCONFIG=y
|
ramips: add support for TP-Link TL-WR840N v4 and TL-WR841N v13
TP-Link TL-WR840N v4 and TL-WR841N v13 are simple N300 routers with
5-port FE switch and non-detachable antennas. Both are very similar
and are based on MediaTek MT7628NN (aka MT7628N) WiSoC.
The difference between these two models is in number of available
LEDs, buttons and power input switch.
This work is partially based on GitHub PR#974.
Specification:
- MT7628N/N (580 MHz)
- 64 MB of RAM (DDR2)
- 8 MB of FLASH
- 2T2R 2.4 GHz
- 5x 10/100 Mbps Ethernet
- 2x external, non-detachable antennas
- UART (J1) header on PCB (115200 8n1)
- TL-WR840N v4: 5x LED (GPIO-controlled), 1x button
- TL-WR841N v13: 8x LED (GPIO-controlled*), 2x button, power input
switch
* WAN LED in TL-WR841N v13 is a dual-color, dual-leads type which isn't
(fully) supported by gpio-leds driver. This type of LED requires both
GPIOs state change at the same time to select color or turn it off.
For now, we support/use only the green part of the LED.
Factory image notes:
These devices use version 3 of TP-Link header, fortunately without RSA
signature (at least in case of devices sold in Europe). The difference
lays in the requirement for a non-zero value in "Additional Hardware
Version" field. Ideally, it should match the value stored in vendor
firmware header on device ("0x4"/"0x13" for these devices) but it seems
that anything other than "0" is correct.
We are able to prepare factory firwmare file which is accepted and
(almost) correctly flashed from the vendor GUI. As it turned out, it
accepts files without U-Boot image with second header at the beginning
but due to some kind of bug in upgrade routine, flashed image gets
corrupted before it's written to flash.
Tests showed that the GUI upgrade routine copies value of "Additional
Hardware Version" from existing firmware into offset "0x2023c" in
provided file, _before_ storing it in flash. In case of vendor firmware
upgrade files (which all include U-Boot image and two headers), this
offset points to the matching field in kernel+rootfs firmware part
header. Unfortunately, in case of LEDE factory image file which contains
only one header, it points to the offset "0x2023c" in kernel image. This
leads to a corrupted kernel and ends up with a "soft-bricked" device.
The good news is that U-Boot in these devices contains well known tftp
recovery mode, which can be triggered with "reset" button. What's more,
in comparison to some of older MediaTek based TP-Link devices, this
recovery mode doesn't write whole file at offset "0x0" in flash, without
verifying provided file in advance. In case of recovery mode in these
devices, first "0x20000" bytes are always skipped and "0x7a0000" bytes
from rest of the file are stored in flash at offset "0x20000".
Flash instruction:
Until (if at all) TP-Link fixes described problem, the only way to flash
LEDE image in these devices is to use tftp recovery mode in U-Boot:
1. Configure PC with static IP 192.168.0.66/24 and tftp server.
2. Rename "lede-ramips-mt7628-tl-wr84...-squashfs-tftp-recovery.bin"
to "tp_recovery.bin" and place it in tftp server directory.
3. Connect PC with one of LAN ports, press the reset button, power up
the router and keep button pressed for around 6-7 seconds, until
device starts downloading the file.
4. Router will download file from server, write it to flash and reboot.
To access U-Boot CLI, keep pressed "4" key during boot.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
7 years ago
|
|
|
CONFIG_SWCONFIG_LEDS=y
|
|
|
|
|
CONFIG_SWPHY=y
|
|
|
|
|
CONFIG_SYSCTL_EXCEPTION_TRACE=y
|
|
|
|
|
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
|
|
|
|
|
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
|
|
|
|
|
CONFIG_SYS_HAS_EARLY_PRINTK=y
|
|
|
|
|
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
|
|
|
|
|
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
|
|
|
|
|
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
|
|
|
|
|
CONFIG_SYS_SUPPORTS_MIPS16=y
|
|
|
|
|
CONFIG_TICK_CPU_ACCOUNTING=y
|
|
|
|
|
CONFIG_USB_SUPPORT=y
|
|
|
|
|
CONFIG_USE_OF=y
|
|
|
|
|
CONFIG_WATCHDOG_CORE=y
|
