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146 lines
3.8 KiB
C
146 lines
3.8 KiB
C
9 years ago
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/* Copyright OpenWrt.org (C) 2015.
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* Copyright Altera Corporation (C) 2014. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2,
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* as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Adopted from dwmac-socfpga.c
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* Based on code found in mach-oxnas.c
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*/
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#include <linux/mfd/syscon.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_net.h>
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#include <linux/phy.h>
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#include <linux/regmap.h>
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#include <linux/reset.h>
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#include <linux/stmmac.h>
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#include <mach/hardware.h>
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#include "stmmac.h"
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#include "stmmac_platform.h"
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struct oxnas_gmac {
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struct clk *clk;
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};
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static int oxnas_gmac_init(struct platform_device *pdev, void *priv)
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{
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struct oxnas_gmac *bsp_priv = priv;
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int ret = 0;
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unsigned value;
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ret = device_reset(&pdev->dev);
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if (ret)
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return ret;
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if (IS_ERR(bsp_priv->clk))
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return PTR_ERR(bsp_priv->clk);
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clk_prepare_enable(bsp_priv->clk);
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value = readl(SYS_CTRL_GMAC_CTRL);
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/* Enable GMII_GTXCLK to follow GMII_REFCLK, required for gigabit PHY */
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value |= BIT(SYS_CTRL_GMAC_CKEN_GTX);
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/* Use simple mux for 25/125 Mhz clock switching */
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value |= BIT(SYS_CTRL_GMAC_SIMPLE_MUX);
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/* set auto switch tx clock source */
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value |= BIT(SYS_CTRL_GMAC_AUTO_TX_SOURCE);
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/* enable tx & rx vardelay */
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value |= BIT(SYS_CTRL_GMAC_CKEN_TX_OUT);
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value |= BIT(SYS_CTRL_GMAC_CKEN_TXN_OUT);
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value |= BIT(SYS_CTRL_GMAC_CKEN_TX_IN);
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value |= BIT(SYS_CTRL_GMAC_CKEN_RX_OUT);
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value |= BIT(SYS_CTRL_GMAC_CKEN_RXN_OUT);
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value |= BIT(SYS_CTRL_GMAC_CKEN_RX_IN);
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writel(value, SYS_CTRL_GMAC_CTRL);
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/* set tx & rx vardelay */
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value = 0;
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value |= SYS_CTRL_GMAC_TX_VARDELAY(4);
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value |= SYS_CTRL_GMAC_TXN_VARDELAY(2);
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value |= SYS_CTRL_GMAC_RX_VARDELAY(10);
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value |= SYS_CTRL_GMAC_RXN_VARDELAY(8);
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writel(value, SYS_CTRL_GMAC_DELAY_CTRL);
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return 0;
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}
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static void oxnas_gmac_exit(struct platform_device *pdev, void *priv)
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{
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struct reset_control *rstc;
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clk_disable_unprepare(priv);
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devm_clk_put(&pdev->dev, priv);
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rstc = reset_control_get(&pdev->dev, NULL);
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if (!IS_ERR(rstc)) {
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reset_control_assert(rstc);
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reset_control_put(rstc);
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}
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}
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static int oxnas_gmac_probe(struct platform_device *pdev)
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{
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struct plat_stmmacenet_data *plat_dat;
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struct stmmac_resources stmmac_res;
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int ret;
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struct device *dev = &pdev->dev;
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struct oxnas_gmac *bsp_priv;
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bsp_priv = devm_kzalloc(dev, sizeof(*bsp_priv), GFP_KERNEL);
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if (!bsp_priv)
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return -ENOMEM;
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bsp_priv->clk = devm_clk_get(dev, "gmac");
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if (IS_ERR(bsp_priv->clk))
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return PTR_ERR(bsp_priv->clk);
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ret = stmmac_get_platform_resources(pdev, &stmmac_res);
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if (ret)
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return ret;
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plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
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if (IS_ERR(plat_dat))
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return PTR_ERR(plat_dat);
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plat_dat->bsp_priv = bsp_priv;
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plat_dat->init = oxnas_gmac_init;
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plat_dat->exit = oxnas_gmac_exit;
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ret = oxnas_gmac_init(pdev, bsp_priv);
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if (ret)
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return ret;
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return stmmac_dvr_probe(dev, plat_dat, &stmmac_res);
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}
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static const struct of_device_id oxnas_gmac_match[] = {
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{ .compatible = "plxtech,nas782x-gmac" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, oxnas_gmac_match);
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static struct platform_driver oxnas_gmac_driver = {
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.probe = oxnas_gmac_probe,
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.remove = stmmac_pltfr_remove,
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.driver = {
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.name = "oxnas-gmac",
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.pm = &stmmac_pltfr_pm_ops,
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.of_match_table = oxnas_gmac_match,
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},
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};
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module_platform_driver(oxnas_gmac_driver);
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MODULE_LICENSE("GPL v2");
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