From d9440f7cb8fa5853b9dcc6e2b165725ac3e8b70c Mon Sep 17 00:00:00 2001
From: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Date: Wed, 27 Nov 2019 13:34:51 +0200
Subject: [PATCH] drm/imx/hdp: fix issue with non-SCDC HDMI sinks

Currently, if sink does not support SCDC, even if the sink is HDMI 1.4 or 2.0,
the hdmi_type is left to default value (MODE_DVI). Hence the HDMI controler is
not properly initialized when cdns_hdmi_ctrl_init() is called.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Reported-by: Jared Hu <jared.hu@nxp.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
---
 drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

--- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c
+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c
@@ -29,11 +29,17 @@
 static void hdmi_sink_config(struct cdns_mhdp_device *mhdp)
 {
 	struct drm_scdc *scdc = &mhdp->connector.base.display_info.hdmi.scdc;
-	u8 buff;
+	struct drm_display_info *di = &mhdp->connector.base.display_info;
+	u8 buff = 0;
+
+	if (scdc->supported || di->color_formats & DRM_COLOR_FORMAT_YCRCB420)
+		mhdp->hdmi.hdmi_type = MODE_HDMI_2_0;
+	else
+		mhdp->hdmi.hdmi_type = MODE_HDMI_1_4;
 
 	/* check sink support SCDC or not */
-	if (scdc->supported != true) {
-		DRM_INFO("Sink Not Support SCDC\n");
+	if (!scdc->supported) {
+		DRM_INFO("Sink does not support SCDC\n");
 		return;
 	}
 
@@ -43,19 +49,13 @@ static void hdmi_sink_config(struct cdns
 		 * Enable scrambling and TMDS_Bit_Clock_Ratio
 		 */
 		buff = SCDC_TMDS_BIT_CLOCK_RATIO_BY_40 | SCDC_SCRAMBLING_ENABLE;
-		mhdp->hdmi.hdmi_type = MODE_HDMI_2_0;
 	} else  if (scdc->scrambling.low_rates) {
 		/*
 		 * Enable scrambling and HDMI2.0 when scrambling capability of sink
 		 * be indicated in the HF-VSDB LTE_340Mcsc_scramble bit
 		 */
 		buff = SCDC_SCRAMBLING_ENABLE;
-		mhdp->hdmi.hdmi_type = MODE_HDMI_2_0;
-	} else {
-		/* Default work in HDMI1.4 */
-		buff = 0;
-		mhdp->hdmi.hdmi_type = MODE_HDMI_1_4;
-	 }
+	}
 
 	/* TMDS config */
 	cdns_hdmi_scdc_write(mhdp, 0x20, buff);
